A display device includes a display panel, a data driver, a scan driver, and a light emitting driver. The display panel includes a first display area and a second display area. The display panel displays a first image on the first display area and the second display area in a first mode, and displays a second image on the first display area in a second mode. The light emitting driver activates emission control signals applied to the first display area and the second display area in the first mode. The light emitting driver activates emission control signals applied to the second display area during a first partial frame in the second mode, and maintains the emission control signals applied to the second display area in a deactivation state during a plurality of second partial frames in the second mode.

Provided is a scan driver of a display device, and the scan driver includes a driving circuit and a masking circuit. The driving circuit includes a control circuit, a first output circuit, and a second output circuit. The control circuit outputs a first control signal and a second control signal. The first output circuit is connected to a first output terminal which outputs a first scan signal and a first voltage terminal and operates in response to a first control signal. The second output circuit is connected to a first output terminal and a second voltage terminal and operates in response to a second control signal. The masking circuit outputs a second scan signal to a second output terminal in response to the first control signal and the second control signal and is connected to an input terminal to which a masking signal is supplied.

A display device includes a plurality of pixel circuits and a gate driver including a plurality of stages configured to output a gate signal to a plurality of gate lines, respectively, to provide the gate signal to the pixel circuits. Each of the stages is divided into a plurality of sub-blocks. At least one of the pixel circuits is located between two adjacent sub-blocks of the sub-blocks.

A pixel unit includes a first organic light emitting diode for a front-side emission, a second organic light emitting diode for a back-side (both-sides) emission, and a pixel circuit configured to driver the first and second organic light emitting diodes. The pixel unit PU may include a pixel circuit, a first organic light emitting diode and a second organic light emitting diode.

Provided are a display device and a method of manufacturing the display device. The display device includes a substrate including a display area and a peripheral area outside the display area, a plurality of data lines disposed in the display area, a plurality of lines disposed in the display area, respectively connected to the plurality of data lines, and configured to respectively transmit a data signal from a driving circuit disposed in the peripheral area to the plurality of data lines, an insulating layer covering the plurality of lines; and a light-emitting element disposed on the insulating layer, wherein each of the plurality of lines comprises a plurality of branches branched in a direction crossing an extending direction of the line, and a black layer is disposed on an insulating layer at a position corresponding to an interval between a plurality of adjacent branches in a vertical direction.

A light emitting display apparatus includes a plurality of emission pixels in an active area, a plurality of dummy pixels in a dummy area; and a plurality of repair lines, each connecting an emission pixel of the emission pixels to a dummy pixel of the dummy pixels, wherein a data signal is simultaneously provided to the emission pixel and the dummy pixel which are connected to the repair line so that the emission pixel emits light.

An array substrate includes a base, a first conductive layer disposed at a side of the base, an insulating layer disposed at a side of the first conductive layer away from the base, and a second conductive layer disposed at a side of the insulating layer away from the first conductive layer. The insulating layer is provided with a first via hole exposing the first electrode of the first transistor and a second via hole exposing the first electrode of the second transistor. The second conductive layer includes a first conductive connection portion, and the first conductive connection portion connects the first electrode of the first transistor and the first electrode of the second transistor through the first via hole and the second via hole.

The present invention provides a technique for reducing pixel brightness unevenness in a case where driving circuits for switching gate lines to a selected or non-selected state are provided in pixels. An active matrix substrate includes, in each pixel PIX, a pixel-switching element 10 and a pixel electrode PXB. Further, in the active matrix substrate, a plurality of driving circuits that switch one gate line to a selected or non-selected state are arranged in the pixels, and control lines 16 that supply control signals to the driving circuits are arranged in the pixels. Each driving circuit includes a plurality of switching elements and an internal line netA. At least a part of the driving circuit lines among the control lines 16 connected to the driving circuit, and the internal line netA in the driving circuits, are arranged in the vicinity of the pixel-switching element 10, and potentials thereof do not change at a timing when the gate line 13 connected with the pixel-switching element 10 shifts to the non-selected state.

Provided is a display panel, including: a display region having an anomaly shape; a plurality of first test transistors; a plurality of second test transistors; and test control signal supply wiring through which a control signal for turning on or off the first and second test transistors is to be supplied, in which first test transistors connected to gate lines crossing an anomaly part of the anomaly shape and second test transistors connected to data lines crossing the anomaly part are arranged in other patterns than a straight line, and in which the test control signal supply wiring includes first test control signal supply wiring, which is connected to control electrodes of the plurality of first test transistors, and second test control signal supply wiring, which is branched out from the first test control signal supply wiring and is connected to control electrodes of the plurality of second test transistors.

A display device includes first pixels in a first pixel area, second pixels in a second pixel area, first stages, second stages, and third stages. The first pixels are electrically connected to first signal lines, second signal lines, and data lines. The second pixels are electrically connected to at least a portion of third signal lines, fourth signal lines, or data lines. The first stages supply a first signal to the first and third signal lines. The second stages supply a second signal to the second signal lines and at least one of the fourth signal lines. The third stages supply the second signal to the fourth signal lines other than the at least one fourth signal line connected to the second stages. The second stages are spaced from the third stages.