A display panel includes a displaying area including pixels, a non-displaying area including a dummy pixel, and a switching circuit to transfer a data signal to the dummy pixel in response to a control signal. The display panel may compensate for defective pixels located in different data lines using only one dummy pixel column and may minimize an area (e.g., a dead space) including the dummy pixel column by including a distributor buffering a signal of an output line and a switching circuit selecting/providing a portion of a signal of the output line to a dummy data line.

Disclosed are a slew boost amplifier and a display driver having the same, which include a first current generation circuit configured to apply a first current to an upper current mirror circuit, a second current generation circuit configured to apply a second current to a lower current mirror circuit, and a comparison circuit configured to detect a difference between an input voltage and an output voltage and to apply the first current when the difference is greater than or equal to a first predetermined threshold and the second current generation circuit to apply the second current when the difference is less than a second predetermined threshold.

An electronic device includes a first source group and a second source group, each of which includes a plurality of source channels, and a gamma block that receives first to 2i-th initial voltages (i being an integer of 1 or more), outputs first to 2i-th intermediate voltages by amplifying the first to i-th initial voltages, and outputs first to i-th gamma voltages to the first source group by buffering the first to 2i-th intermediate voltages, and a first buffer block that receives the first to 2i-th intermediate voltages from the gamma block and buffers the first to 2i-th intermediate voltages so as to be output to the second source group, and the gamma block may include a first resistor string including a plurality of resistors connected between nodes from which the first to i-th gamma voltages are output.

Methods and apparatuses relating to controlling an emission of a display panel. In one embodiment, a display driver hardware circuit includes row selection logic to select a number of rows in an emission group of a display panel, wherein the number of rows is adjustable from a single row to a full panel of the display panel, column selection logic to select a number of columns in the emission group of the display panel, wherein the number of columns is adjustable from a single column to the full panel of the display panel, and emission logic to select a number of pulses per data frame to be displayed, wherein the number of pulses per data frame is adjustable from one to a plurality and a pulse length is adjustable from a continuous duty cycle to a non-continuous duty cycle.

An array substrate has a display area and a bonding region. The display area includes a distal region, a proximal region, and a middle region therebetween. The array substrate includes a base, a common electrode located in the display area, a connecting lead disposed outside the distal region, a conductive frame at least partially surrounding the display area, and at least one first common signal line, at least one second common signal line and at least one third common signal line. The first common signal line, the second common signal line and the third common signal line are respectively coupled to portions of the common electrode located in the distal region, the proximal region and the middle region. The first common signal line is coupled to the connecting lead. The connecting lead and the portion of the common electrode located in the distal region are coupled to the conductive frame.

A sensing circuit and a correction method thereof, a pixel driving module and a sensing method thereof, and a display apparatus, the sensing circuit includes: an operation amplifier (AMP), an integration capacitor (Cfb), a first switch (S1), a second switch (S2), a third switch (S3), a fourth switch (S4), a fifth switch (S5) and a sixth switch (S6).

A display device includes a display panel, a data driver which provides data voltages to the display panel, and a controller which provides output image data to the data driver. The controller includes a data line memory which stores input image data for each pixel row of the display panel, an address line memory which stores addresses for the input image data, and a data serialize block which generates the output image data provided to the data driver by rearranging the input image data stored in the data line memory based on the addresses stored in the address line memory.

Provided is a display device including: a pixel array unit in which pixels including a light-emitting unit are arranged in a matrix shape; two drive units which are disposed on the same substrate as the pixel array unit with the pixel array unit interposed therebetween, which have output stages in a number that is half of the number of pixel rows of the pixel array unit, and in which the output stages are in charge of driving of pixels on an odd row side and on an even row side; and a control unit which performs control of driving the pixels on the odd row side by using the output stages of one drive unit between the two drive units, of driving the pixels on the even row side by using the output stages of the other drive unit, and of inverting the driving for each field.

Display panel redundancy schemes and methods of operation are described. In an embodiment, and display panel includes an array of drivers (e.g. microdrivers), each of which including multiple portions to independently receive control and pixel bits. In an embodiment, each driver portion is to control a group of redundant emission elements.

A semiconductor device including a first buffer circuit and a second buffer circuit each configured to output a control signal to one control line based on an input from a signal output circuit, and an element configured to receive the control signal transmitted through the one control line. The second buffer circuit is switchable between electrical connection and electrical disconnection to the one control line. A first mode in which a current is supplied to the one control line with a first driving capability by the first buffer circuit and a second mode in which a current is supplied to the one control line with a second driving capability greater than the first driving capability by both the first buffer circuit and the second buffer circuit are switchable.