A shift register, a gate driving circuit and a driving method for the same, and a liquid crystal display. The shift register includes: a pull-up sub-circuit configured to set a potential at a pull-up node to an operating potential when a first input signal is received via a first input terminal; a first output sub-circuit configured to output a gate driving signal at an output terminal according to a first clock signal received via a first clock signal terminal when the potential at the pull-up node is the operating potential; and a second output sub-circuit configured to output a gate driving signal at the output terminal when a second input signal is received via a second input terminal during a period other than a duration in which one frame of picture is displayed.

Provided are a data current generation circuit, a driving method therefor, a driver chip, and a display panel, where a threshold capture module of the data current generation circuit is connected between a gate and a second electrode of a first transistor and is configured to capture a threshold voltage of the first transistor, a data voltage generation module is configured to generate a data voltage, a data voltage transmission module is connected between the data voltage generation module and a threshold voltage acquisition and superposition module and is configured to transmit the data voltage generated by the data voltage generation module to the threshold voltage acquisition and superposition module when the data voltage transmission module is turned on, and the threshold voltage acquisition and superposition module is configured to acquire the threshold voltage of the first transistor.

A multi-screen display control device includes a plurality of graphics processing units (GPUs) and a watchdog chip. The GPUs transform image data that a host transfers to the multi-screen display control device through a universal serial bus (USB) interface into a plurality of high-definition multi-media interface (HDMI) sub-images to be displayed by a plurality of screens. The watchdog chip is coupled to the GPUs and, when any of the GPUs crashes, the watchdog chip outputs a reset signal to reset all of the GPUs.

An electronic display includes a plurality of pixels, each pixel including a data line, first and second selection lines and a common electrode. A control circuit element includes first and second diode-like elements coupled between the first and second selection lines and a charging node. A charging capacitive element is coupled between the charging node and the date line. An active pixel element is coupled between the charging node and the common electrode. The common electrode can overly the entire electronic display and is a suitable transparent conductive material. Each of the first and second diode-like elements includes an amorphous metal non-linear resistor. The active pixel element may include one of liquid crystal display circuitry, light emitting diode circuitry, and electrophoretic circuitry.

A display device and a compensation method of the display device are discussed. A sensing method for compensation, which is performed after a display device is powered off, includes displaying 1 black frame, charging a node M of a shift register A connected to a j.sup.th gate line of a display panel, charging a node M of a shift register B connected to a K.sup.th gate line of the display panel, and sensing subpixels connected to the j.sup.th gate line and then sensing subpixels connected to the K.sup.th gate line.

Methods for efficiently clearing previous state information when driving a multi-particle color electrophoretic medium, for example, wherein at least two of the particles are colored and subtractive and at least one of the particles is scattering. Typically, such a system includes a white particle and cyan, yellow, and magenta subtractive primary colored particles. The clearing pulse may include two different portions of alternating impulses and the overall waveform may be DC balanced.

A current compensation circuit, a virtual reality device and a control method are disclosed. The current compensation circuit includes: a first constant current sub-circuit, configured to generate a driving current of a backlight module; a second constant current sub-circuit, configured to generate a compensation current of the backlight module; a compensation gating sub-circuit, configured to determine whether to select the second constant current sub-circuit to supply power to the backlight module; and a black insertion control signal generation sub-circuit, configured to generate a black insertion control signal, connected with the first constant current sub-circuit and the compensation gating sub-circuit, and configured to control, by the black insertion control signal, the first constant current sub-circuit and the second constant current sub-circuit to simultaneously supply power to or power off the backlight module, so that the black light module realizes a backlight black insertion.

An electronic display includes a plurality of pixels, each pixel including a data line, first and second selection lines and a common electrode. A control circuit element includes first and second diode-like elements coupled between the first and second selection lines and a charging node. A charging capacitive element is coupled between the charging node and the date line. An active pixel element is coupled between the charging node and the common electrode. The common electrode can overly the entire electronic display and is a suitable transparent conductive material. Each of the first and second diode-like elements includes an amorphous metal non-linear resistor. The active pixel element may include one of liquid crystal display circuitry, light emitting diode circuitry, and electrophoretic circuitry.

A display apparatus includes a plurality of pixels. A pixel includes a first capacitor connected between a first voltage line receiving a first driving signal and a first node, a first transistor comprising a control electrode connected to the first node, a first electrode connected to a second voltage line receiving a first power source signal and a second electrode connected to a second node, an organic light emitting diode comprising an anode electrode connected to the second node and a cathode electrode receiving a second power source signal, a second capacitor connected between an m-th data line and the second node (wherein, ‘m’ is a natural number) and a second transistor comprising a control electrode connected to an n-th scan line (wherein, ‘n’ is a natural number), a first electrode connected to the first node and a second electrode connected to the second node.

Disclosed are an image display method, a device, a smart TV, and a readable storage medium. The image display method includes: acquiring an original image signal of a current frame image; extracting evenly spaced rows of data from the original image signal of the current frame image to form a pre-processed image signal; acquiring each row of data in the pre-processed image signal, scanning the each row of data, synchronously acquiring at least two rows of scan images corresponding to the each row of data to form a display image of the current frame image; and acquiring a frame frequency of the original image signal and a vertical synchronization signal of the display image, controlling a period of a backlight pulse signal according to the frame frequency, controlling a duty cycle of the backlight pulse signal according to a period of the vertical synchronization signal, and displaying the display image.