Patent classifications
G11B20/10037
DECISION FEEDBACK EQUALIZATION IN SEMICONDUCTOR DEVICES
Electronic circuits, memory devices, and methods for compensating for data distortion from channel loss are provided. In one aspect, an electronic circuit includes a converter circuit configured to convert an input signal to a digital signal and a compensation circuit coupled to the converter circuit. The converter circuit includes a sampling circuit configured to receive the digital signal and generate an output signal. The output signal includes a stream of bits to be transmitted at a plurality of consecutive clock cycles. The converter circuit also includes one or more equalizing circuits coupled to the sampling circuit. Each equalizing circuit is configured to receive a bit of an output feedback signal at one of the consecutive clock cycles. The sampling circuit is configured to generate the output signal based on the digital signal and a sum of one or more equalization outputs of the one or more equalizing circuits.
Data Read Synchronization from Phase Modulated Synchronization Fields in a Data Storage Device
Example channel circuits, data storage devices, and methods for data read synchronization from phase modulated synchronization fields are described. A data synchronization detector may receive an oversampled digital read signal read from a synchronization field that uses a single written pattern to encode the start of data position, phase, and gain for the read channel. The write pattern may use a phase modulated carrier signal to encode a pseudo-random binary sequence indicating the start of data position.
Data read synchronization from phase modulated synchronization fields in a data storage device
Example channel circuits, data storage devices, and methods for data read synchronization from phase modulated synchronization fields are described. A data synchronization detector may receive an oversampled digital read signal read from a synchronization field that uses a single written pattern to encode the start of data position, phase, and gain for the read channel. The write pattern may use a phase modulated carrier signal to encode a pseudo-random binary sequence indicating the start of data position.
CHARACTERIZING A SENSING CIRCUIT OF A DATA STORAGE DEVICE
A data storage device is disclosed comprising a disk, a head for accessing the disk, and a sensor for generating an alternating sensor signal. The sensor is disconnected from an input of a sensing circuit and while the sensor is disconnected an alternating calibration signal is injected into the input of the sensing circuit, wherein the alternating calibration signal comprises a predetermined offset and amplitude. A response of the sensing circuit to the alternating calibration signal is evaluated to detect at least one of an offset and a gain of the sensing circuit.
Optical medium reproduction apparatus and optical medium reproduction method
The present disclosure relates to a reproduction apparatus. The reproduction apparatus may comprise an optical filter and electric filters. The optical filter may be configured to provide electrical signals corresponding to regions of an optical beam returning from an optical medium, the optical beam being incident on the optical filter, the regions of the optical beam corresponding to different bands in a line density direction and/or a track density direction. The electric filters may be configured to provide outputs based, at least in part, on the electrical signals provided by the optical filter, wherein the reproduction apparatus is configured to obtain a reproduced signal by combining the outputs of the electric filters.
DISC DRIVE CIRCUITRY SWAP
A method comprises creating calibration data using a first control circuitry of an apparatus, replacing the first control circuitry with a second control circuitry in the apparatus, and operating the apparatus with the second control circuitry using the calibration data. As an example, the apparatus may be a disc drive. The second control circuitry may be substantially similar to the first control circuitry such that calibration measurements using the first control circuitry are applicable to the second control circuitry. The first control circuitry may be included in a circuit board that is replaced with a second circuit board including the second control circuitry. In an exemplary embodiment, the second circuit board may include different and/or additional components relative to the first circuit board, such as integrated video inputs and/or video control circuitry.
Systems and methods for a data processing using integrated filter circuit
Systems and methods are disclosed relating generally to data processing, and more particularly to applying low pass and rotation filtering in relation to data processing. For example, a system may include a phase modification value determination circuit operable to generate a phase offset value based upon an input data set derived from information sensed from a storage medium. The system may include an integrated low pass and rotation filtering circuit operable to simultaneously apply a low pass filtering function and phase rotation function to a series of digital samples derived from the information sensed from the storage medium to yield a modified output. Application of both the low pass filtering and phase rotation functions is governed at least in part based upon a selected coefficient set corresponding to a combination of the phase off set value and a boost value.
MIX BUFFERS AND COMMAND QUEUES FOR AUDIO BLOCKS
The subject disclosure is directed towards a technology that may be used in an audio processing environment. Nodes of an audio flow graph are associated with virtual mix buffers. As the flow graph is processed, commands and virtual mix buffer data are provided to audio fixed-function processing blocks. Each virtual mix buffer is mapped to a physical mix buffer, and the associated command is executed with respect to the physical mix buffer. One physical mix buffer mix buffer may be used as an input data buffer for the audio fixed-function processing block, and another physical mix buffer as an output data buffer, for example.
Minimizing delay periods when accessing mirrored disks
Various embodiments of the present invention that include arranging a first storage device and second storage device to store data in a mirrored configuration. Upon receiving a message indicating that the first storage device is in an error recovery mode, the host processor can convey a second request to read the data from the second storage device. The storage device is selected from a list comprising a hard disk drive and a solid state disk drive, and the hard disk drive comprises a disk head having a magnetoresistive (MR) element configured to read and write data to and from the storage media, and coupled to an analog/digital (A/D) converter, and wherein the error recovery operation is selected from a list comprising changing an automatic gain control of the A/D converter, positioning the disk head off-track in order to read the data, and adjusting a bias value of the MR element.
Disc drive circuitry swap
A method comprises creating calibration data using a first control circuitry of an apparatus, replacing the first control circuitry with a second control circuitry in the apparatus, and operating the apparatus with the second control circuitry using the calibration data. As an example, the apparatus may be a disc drive. The second control circuitry may be substantially similar to the first control circuitry such that calibration measurements using the first control circuitry are applicable to the second control circuitry. The first control circuitry may be included in a circuit board that is replaced with a second circuit board including the second control circuitry. In an exemplary embodiment, the second circuit board may include different and/or additional components relative to the first circuit board, such as integrated video inputs and/or video control circuitry.