An apparatus may include a circuit that initializes a read operation to read one or more requested data segments of a respective data unit. The circuit may generate equalized combined samples for a failed data segment of the one or more requested data segments based on first samples and second samples. In addition, the circuit may perform iterative outer code recovery for the data unit utilizing the equalized combined samples as samples for the failed data segment.

Examples are disclosed that relate to encoding data on a data-storage medium. The method comprises obtaining a representation of a measurement performed on the data-storage medium, the representation being based on a previously recorded pattern of data encoded in the data-storage medium in a layout that defines a plurality of data locations. The method further comprises inputting the representation into a data decoder comprising a trained machine-learning function, and obtaining from the data decoder, for each data location of the layout, a plurality of probability values, wherein each probability value is associated with a corresponding data value and represents the probability that the corresponding data value matches the actual data value in the previously recorded pattern of data at a same location in the layout.

Examples are disclosed that relate to reading stored data. The method comprises obtaining a representation of a measurement performed on a data-storage medium, the representation being based on a previously recorded pattern of data encoded in the data-storage medium in a layout that defines a plurality of data locations. The method further comprises inputting the representation into a data decoder comprising a trained machine-learning function, and obtaining from the data decoder, for each data location of the layout, a plurality of probability values, wherein each probability value is associated with a corresponding data value and represents the probability that the corresponding data value matches the actual data value in the previously recorded pattern of data at a same location in the layout.

Systems and techniques relating to decoder memory management are described. A described system includes a decoder system configured to perform decoder processes in order to decode signals generated by reading a storage medium, the decoder processes being associated with respective memory thresholds; and a memory structure coupled with the decoder system. The decoder processes use the memory structure in accordance with the respective memory thresholds. The decoder system can be configured to detect whether the memory structure is underutilized by a process of the decoder processes, determine an underutilization amount associated with the process with respect to the memory threshold of the process, identify a target decoder process of the decoder processes, and enable the target decoder process to exceed the memory threshold of the target decoder process based on the underutilization amount. Enabling the target decoder process to exceed can increase decoding performance of the target decoder process.

Systems, devices, and method for phase slip recovery may include reading a plurality of data portions of a data block and positioning a mask over one or more data portions of the data block. The data portions following the mask may be shifted to provide a masked, reframed data block, and then the data block may be attempted to be decoded, which may be repeated until the data block is decoded.

A data object has a lock and a condition indicator associated with it. Based at least partly on detecting a first setting of the condition indicator, a reader stores an indication that the reader has obtained read access to the data object in an element of a readers structure and reads the data object without acquiring the lock. A writer detects the first setting and replaces it with a second setting, indicating that the lock is to be acquired by readers before reading the data object. Prior to performing a write on the data object, the writer verifies that one or more elements of the readers structure have been cleared.

A data processing system is disclosed including a data detector, a data decoder and an alignment detector. The data detector is operable to apply a data detection algorithm to generate detected values for a data sector. The data decoder is operable to apply a data decode algorithm to a decoder input derived from the detected values to yield decoded values. The alignment detector is operable to calculate an offset between multiple versions of the data sector by correlating the multiple versions.

According to one embodiment, a storage device includes a detector, a demodulator, a controller, and a recorder. When a user data item is split data including first data being at least part of a first code word and second data being at least part of a second code word, the controller sets a start position of the second data for forced search of the second code word on the basis of the position of a sync mark recorded in the recorder when the forced search of the first code word has succeeded.

A magnetic disk device includes a magnetic disk that includes a plurality of tracks, a magnetic head for reading data from the magnetic disk, and a controller. The controller begins controlling the magnetic head to move to a second track of the plurality of tracks from a first track of the plurality of tracks before decoding of a first track signal output from the magnetic head is completed, wherein the first track signal is output from the magnetic head while the magnetic head is positioned over the first track.

A magnetic disk device includes a magnetic disk that includes a plurality of tracks, a magnetic head for reading data from the magnetic disk, and a controller. The controller begins controlling the magnetic head to move to a second track of the plurality of tracks from a first track of the plurality of tracks before decoding of a first track signal output from the magnetic head is completed, wherein the first track signal is output from the magnetic head while the magnetic head is positioned over the first track.