Patent classifications
G11B20/1833
Read channel buffer management for higher throughput decoding
An error recovery process provides for identifying a set of failed data blocks read from a storage medium during execution of a read command, populating sample buffers in a read channel with data of a first subset of the set of failed data blocks, and initiating an error recovery process on the data in the sample buffers. Responsive to successful recovery of one or more data blocks in the first subset, recovered data is released from the sample buffers and sample buffers locations previously-storing the recovered data are repopulated with data of a second subset of the set of failed data blocks. The error recovery process is then initiated on the data of the second subset of the failed data blocks while the error recovery process is ongoing with respect to data of the first subset of failed data blocks remaining in the sample buffers.
Data storage device employing multi-tier coding for magnetic tape
A data storage device is disclosed comprising at least one head configured to access a magnetic tape. Data is read from the magnetic tape to generate a read signal which is processed to decode a first M blocks of low density parity check (LDPC) type codewords using a LDPC type decoder. First un-converged codewords out of the first M blocks are decoded using a first M-blocks parity, and second un-converged codewords out of the first M blocks are decoded using an erasure code.
Efficient rewrite using larger codeword sizes
In one embodiment, a method includes writing a data set to a sequential access medium. The method also includes reading the data set after being written in a read-while-write process to identify faulty encoded data blocks, each of the faulty encoded data blocks including at least one faulty codeword. Moreover, the method includes rewriting a correct version of a first of the encoded data blocks in a first encoded data block set to the rewrite area of the sequential access medium selected from a predetermined subset of logical tracks. The predetermined subset of logical tracks includes D1+D2+1 logical tracks. Only one encoded data block from a particular sub data set is rewritten in a single encoded data block set in the rewrite area.
Magnetic tape recording device including cartridge memory having a plurality of memory banks
A cartridge memory used for a tape cartridge includes: a communication unit that communicates with a recording and reproducing device using a wireless communication method defined by an ISO 14443-2 standard which is a wireless communication standard; a non-volatile memory with a storage capacity exceeding 16 KB; and a control unit that writes or reads data to or from the non-volatile memory on a word-by-word basis (2 bytes at a time) or on a block-by-block basis (32 bytes at a time). The non-volatile memory includes a plurality of memory banks each having a storage capacity of 128 KB or less. The control unit writes or reads data defined by a magnetic tape standard to or from one or two or more first memory banks among the plurality of the memory banks, and writes or reads additional data to or from one or two or more second memory banks other than the first memory bank.
Techniques for utilizing volatile memory buffers to reduce parity information stored on a storage device
Disclosed are techniques for managing parity information for data stored on a storage device. A method can be implemented at a computing device communicably coupled to the storage device, and include (1) receiving a request to write data into a data band of the storage device, (2) writing the data into stripes of the data band, comprising, for each stripe of the data band: (i) calculating first parity information for the data written into the stripe, (ii) writing the first parity information into a volatile memory, and (iii) in response to determining that a threshold number of stripes have been written: converting the first parity information into smaller second parity information, and (3) in response to determining that the data band is read-verified: (i) converting the second parity information into smaller third parity information, and (ii) storing the smaller third parity information into a parity band of the storage device.
Error correction for storage devices
A method for performing error recovery for data stored on a track of a storage device, in which the method includes: receiving a request to read the data from the storage device, identifying a plurality of sectors of the track to be read in response to the request, reading the data from the plurality of sectors of the track and parity data, based on the data read from the plurality of sectors, determining whether any of the plurality of sectors corresponds to a failed sector, and recovering a portion of the data from the failed sector using the parity data and portions of the data stored in remaining ones of the plurality of sectors.
Memory controller, memory system, and memory control method
According to one embodiment, a nonvolatile memory includes a plurality of memory areas and controller circuit including an error correction code encoder. The error correction code encoder encodes a first data to generate a first parity in a first operation and encodes a second data to generate a second parity in a second operation. The controller circuit writes the first data and the first parity into a first memory area among the plurality of memory areas and writes the second data and the second parity into a second memory area among the plurality of memory areas. The size of the second data is smaller than the size of the first data and the size of the second parity is equal to the size of the first parity.
MAGNETIC DISK DEVICE AND METHOD OF CONTROLLING THE SAME
According to one embodiment, a first decoding circuit calculates likelihood information by executing Viterbi decoding using a parameter for normalizing a branch metric on a signal sequence read from a magnetic disk. The second decoding circuit generates a first bit data sequence by iterative decoding using the likelihood information, and executes a check using a parity check matrix on the first bit data sequence. The control circuit causes the first decoding circuit and the second decoding circuit to repeatedly execute decoding, and updates the parameter in accordance with a check result obtained every time the decoding by the first decoding circuit and the second decoding circuit is executed. An acquisition circuit acquires numerical information corresponding to the number of bit errors included in the first bit data sequence obtained when the number of times of executions of the decoding is equal to a first value.
Shared error check and correct logic for multiple data banks
Systems and methods related to memory devices that may perform error check and correct (ECC) functionality. The systems and methods may employ ECC logic that may be shared between two or more banks. The ECC logic may be used to perform memory operations such as read, write, and masked-write operations, and may increase reliability of storage data.
Magnetic tape device capable of selecting codeword rewrite based on determined threshold
A methodology that enables, for example, tape drive operation at lower SNR and/or reduced rewrite area uses a first threshold T and a second threshold r for a rewrite condition. Codeword interleaves (CWIs) in a data set are written onto a plurality of simultaneously-written parallel tracks of a magnetic recording medium, read back and error correction decoded. A determination is made as to whether at least one of the C1 or C1 codewords in each decoded CWI contains more byte errors than the second threshold r of the rewrite condition. A number of CWIs in a rewrite buffer are according to the following criteria: b.sub.i=b.sub.iT when b.sub.i is greater than the first threshold T, and b.sub.i=0 when b.sub.i is less than or equal to the first threshold T.