Patent classifications
G11C5/144
POWER-DOWN INTERRUPT OF NONVOLATILE DUAL IN-LINE MEMORY SYSTEM
A nonvolatile memory module includes volatile memory devices; a nonvolatile memory device; and a controller suitable for backing up data stored in the volatile memory devices or restoring data backed up in the nonvolatile memory device, according to a fail/recovery of power of the host, the controller including a power-down interrupt logic which interrupts a backup operation when the power of the host is recovered while performing the backup operation, the power-down interrupt logic including: a logic which determines whether sufficient erased blocks exist in the nonvolatile memory device; a logic which erases a new block when the sufficient erased bocks do not exist; and an interrupt backup logic which backs up a volatile memory device having data corresponding to the erased block, when a fail in the power of the host is detected or a backup operation is instructed from the host.
APPARATUSES, SYSTEMS, AND METHODS FOR VOLTAGE BASED RANDOM NUMBER GENERATION
Apparatuses, systems, and methods for voltage based random number generation. A memory may include a number of different voltages, which may be used to power various operations of the memory. During access operations to the memory, the voltage may vary, for example as word lines of the memory are accessed. The variability of the voltage may represent a source of randomness and unpredictability in the memory. A random number generator may provide a random number based on the voltage. For example, an analog to binary converter (ADC) may generate a binary number based on the voltage, and the random number may be based on the binary number.
Providing power availability information to memory
The present disclosure includes apparatuses and methods for providing power availability information to memory. A number of embodiments include a memory and a controller. The controller is configured to provide power and power availability information to the memory, and the memory is configured to determine whether to adjust its operation based, at least in part, on the power availability information.
STORAGE SYSTEM HAVING A HOST THAT MANAGES PHYSICAL DATA LOCATIONS OF A STORAGE DEVICE
A storage system includes a storage device including a controller and a nonvolatile memory unit, and a host including a processor configured to determine whether or not the host is going to access the storage device within a predetermined range of time, and cause the storage device to be powered off when it is determined that the host is not going to access the storage device within the predetermined range of time.
DATA READING PROCEDURE BASED ON VOLTAGE VALUES OF POWER SUPPLIED TO MEMORY CELLS
A storage device includes a memory cell array, a voltage detector disposed to detect a voltage of power supplied to the memory cell array, and a controller. The controller is configured to carry out reading of data from a target memory cell and then rewriting of the data in the target memory cell, if the detected voltage is above a threshold when a prompt of a read operation with respect to the target memory cell occurs, and prohibit the reading operation from being started, if the detected voltage is below the threshold when the prompt occurs.
Providing energy information to memory
The present disclosure includes apparatuses and methods for providing energy information to memory. An embodiment includes determining, by a host, that a charge level of an energy source coupled to the host has reached or exceeded a threshold value, and transmitting, from the host to a memory device coupled to the host, signaling indicative of an energy mode for the memory device, wherein the signaling is transmitted based at least in part on determining that the charge level of the energy source has reached or exceeded the threshold.
Variable modulation scheme for memory device access or operation
Methods, systems, and devices that support variable modulation schemes for memory are described. A device may switch between different modulation schemes for communication based on one or more operating parameters associated with the device or a component of the device. The modulation schemes may involve amplitude modulation in which different levels of a signal represent different data values. For instance, the device may use a first modulation scheme that represents data using two levels and a second modulation scheme that represents data using four levels. In one example, the device may switch from the first modulation scheme to the second modulation scheme when bandwidth demand is high, and the device may switch from the second modulation scheme to the first modulation scheme when power conservation is in demand. The device may also, based on the operating parameter, change the frequency of the signal pulses communicated using the modulation schemes.
Recovery of memory from asynchronous power loss
Systems and methods are disclosed, including determining whether to write dummy data to a first physical page of memory cells of a storage system, such as in response to a detected asynchronous power loss (APL) at the storage system, using a determined number of zeros in the first physical page.
CONTROLLER AND OPERATION METHOD THEREOF FOR MANAGING READ COUNT INFORMATION OF MEMORY BLOCK
A method for performing a sudden power-off recovery operation of a controller controlling a memory device, the method includes: obtaining open block information for open blocks of the memory device and read counts for the open blocks; updating each of the read counts by adding a set value to each of the read counts; storing the updated read counts in the memory device; sequentially reading pages in each of the open blocks without updating the read counts for the open blocks, based on the open block information, to detect a boundary page after the storing of the updated read counts in the memory device; and controlling the memory device to program dummy data in the detected boundary page.
RECOVERY OF MEMORY DEVICE FROM A REDUCED POWER STATE
Devices and techniques are disclosed herein to control recovery of a memory device from a reduced power state. A memory controller can include a detection circuit configured to monitor the power supply voltage to an array of memory cells during the reduced power state. Control circuitry an initialization procedure for recovery of the memory device from the reduced power state, based on the state of the detection circuit.