Patent classifications
G11C29/886
Performance optimization of read functions in a memory system
According to one aspect, a method for performance optimization of read functions in a memory system includes receiving, at the memory system, a read request including a logical address of a target data. The memory system includes a primary memory and a back-up memory that mirrors the primary memory. The method also includes searching a fault monitor table for an entry corresponding to the received logical address. The fault monitor table includes a plurality of entries that indicate physical locations of identified memory failure events in the primary memory and the back-up memory. Based on locating an entry corresponding to the received logical address, the method further includes selecting one of the primary memory and the backup memory for retrieving the target data. The selection is based on contents of the fault monitor table.
Performance optimization of read functions in a memory system
According to one aspect, a method for performance optimization of read functions in a memory system includes receiving, at the memory system, a read request including a logical address of a target data. The memory system includes a primary memory and a back-up memory that mirrors the primary memory. The method also includes searching a fault monitor table for an entry corresponding to the received logical address. The fault monitor table includes a plurality of entries that indicate physical locations of identified memory failure events in the primary memory and the back-up memory. Based on locating an entry corresponding to the received logical address, the method further includes selecting one of the primary memory and the backup memory for retrieving the target data. The selection is based on contents of the fault monitor table.
OPTIMIZED HANDLING OF NEIGHBOR PLANE DISTURB ISSUES
Memory blocks of a metablock are analyzed and tested to determine whether multiple memory blocks fail a first fault assessment. If more than one memory block fails the first fault assessment, the memory blocks are assigned to a retry pool. When in the retry pool, a second fault assessment is performed on the memory blocks. If one or more of the memory blocks pass the second fault assessment, the memory blocks are placed in a memory block pool and are relinked to other memory blocks to form a new metablock. However, if one or more of the memory blocks fail the second fault assessment, the memory blocks are retired.
VIRTUAL BLOCK MULTI-PLAN ACCESS SYSTEM
The present disclosure configures a memory sub-system controller to read virtual blocks using partial good block (PGBs) across different planes using different read voltages. The controller identifies a region of a set of memory components, the region comprising a plurality of planes across a plurality of decks of the set of memory components. The controller generates an individual virtual block (VB) using a first PGB on a first deck of the plurality of decks of the region associated with a first plane of the plurality of planes and a second PGB on a second deck of the plurality of decks associated with the first plane. The controller, in response to receiving the request to read the data, applies a first read voltage offset to read the individual VB from the first plane in parallel with applying a second read voltage offset to read an additional VB from a second plane.
Data storage device and method for read disturb mitigation during low-power modes
A data storage device can check data integrity on a wordline in memory each time the data storage device exits a low-power mode. Frequent exits from the low-power mode result in the wordline being read many times, which can result in a read disturb problem. To mitigate this problem, in one embodiment disclosed herein, a different wordline is used to check data integrity each time of a plurality of times that the data storage device exits a low-power mode. Using different wordlines for the data integrity check can reduce the likelihood of a read disturb error. Other embodiments are disclosed.
Optimized handling of neighbor plane disturb issues
Memory blocks of a metablock are analyzed and tested to determine whether multiple memory blocks fail a first fault assessment. If more than one memory block fails the first fault assessment, the memory blocks are assigned to a retry pool. When in the retry pool, a second fault assessment is performed on the memory blocks. If one or more of the memory blocks pass the second fault assessment, the memory blocks are placed in a memory block pool and are relinked to other memory blocks to form a new metablock. However, if one or more of the memory blocks fail the second fault assessment, the memory blocks are retired.
Reuse of bad blocks for tasks in a memory sub-system
A failure of a block among a set of blocks of a memory device of a memory sub-system is detected. Based on detecting the failure of the block, the block is evaluated for reuse. The block is designated for reuse based on a result of the evaluating of the block. The block is allocated to a task based on the block being designated for reuse.