The disclosure relates to technology for determining stress on integrated circuits. These include using ring oscillators formed on the integrated circuit, where one ring oscillator has its frequency dependent on the current flowing through its stages being limited by its NMOS devices and another ring oscillator has its frequency dependent on the current flowing through its stages being limited by its PMOS devices. This allows the stress on the integrated circuit to be determined in different directions along the integrated circuit. A temperature sensor can be used to compensate for temperature dependence on the frequencies of the ring oscillators.

An apparatus provides power for computer devices, such as servers, facilitating their testing outside of the typical server rack. A platform of supports the computer device while providing for a power supply unit beneath the platform to be connected to the device. The location of the power supply beneath the platform decreases the combined footprint of the apparatus and device under test. The power supply unit may be configured to connect to standard voltages, allowing the computer device to be tested where connection to rack-level voltage is not convenient.

In one example, a first tubular member has a first diameter and is configured to attach to a printed circuit board. A second tubular member has a second diameter different from the first diameter and is configured to hold an environmental sensor for collecting data relating to an environment of the printed circuit board. The second tubular member is vertically adjustable relative to the first tubular member.

Apparatus, systems, and methods for progressive corrosion detection are disclosed. An example apparatus includes a query generator to query a multiplexer channel to receive an output voltage, the multiplexer channel linked to a fin group of an electrode array, the fin group forming an open circuit in the absence of conductive crystal formation, a quantifier to determine, using a reference voltage, a difference between the reference voltage and the output voltage from the queried multiplexer channel, and a contamination level comparator to identify presence of conductive crystal formation based on the difference between the reference voltage and the output voltage.

A method for dynamic intelligent testing of a target, to be tested according to projects, includes calling up a data distribution model of a project in response to a target being tested by the project, and obtaining a test range corresponding to the project based on the data distribution model. The method further includes obtaining a test value when the target is at a minimum power consumption value by testing the target based on the test range, and updating the data distribution model and the test range of the project based on the test value.

A circuit for detection and warning of electro-migration in a region on a printed circuit board between a first electrically conductive element having a first electrical characteristic and a second electrically conductive element having a second electrical characteristic different than the first. The circuit includes an electrically conductive guard track that is electrically isolated from the first and second elements in the region and has a normal condition electrical characteristic based on the first and second characteristics. The circuit includes an electrical characteristic supervisor to detect an electrical characteristic of the guard track. In response to electro-migration creating an electrical connection of the guard track to the first or second element, the guard track has an abnormal condition electrical characteristic different than the normal condition. In response to detecting the abnormal condition of the guard track, the supervisor effectuates a warning of electro-migration in the region.

A circuit includes one or more sensors formed on one or more dies, each sensor detecting one or more wafer characterization data; a stress generator on the die to control the one or more sensors to place the one or more sensors under stress during wafer manufacturing or operation; and an interface coupled to the one or more sensors to communicate the wafer characterization data to a processor or a tester.

A system and method for identifying latent reliability defects (LRD) in semiconductor devices are configured to perform one or more stress tests with one or more stress test tools on at least some of a plurality of wafers received from one or more in-line sample analysis tools to determine a passing set of the plurality of wafers and a failing set of the plurality of wafers, perform a reliability hit-back analysis on at least some of the failing set of the plurality of wafers, analyze the reliability hit-back analysis to determine one or more geographic locations of one or more die fail chains caused by one or more latent reliability defects (LRD), and perform a geographic hit-back analysis on the one or more geographic locations of the one or more die fail chains caused by the LRD.

A device includes a first oscillator, a second oscillator and a frequency comparison block. The first oscillator includes a first LC tank circuit and is designed to generate first sustained oscillations at a first resonant frequency. The second oscillator includes a second LC tank circuit and is designed to generate second sustained oscillations at a second resonant frequency. The frequency comparison block is designed to perform a comparison of the frequencies of the second sustained oscillations and the first sustained oscillations to determine a change in inductance in one of a first inductor of the first LC tank circuit and a second inductor of the second LC tank circuit. One of the oscillators serves as a reference oscillator, and enables determination of the change in inductance to be immune to changes in environmental conditions.

A thermal chamber multiple sides that form an enclosed chamber. The thermal chamber includes a first side of the multiple sides, the first side configured to adjustably mount an electronic circuit board within the enclosed chamber. The thermal chamber includes a second side of the multiple sides, the second side located opposite the first side and including one or more ports that expose the enclosed chamber. Each of the one or more ports is configured to receive a temperature control component that transfers thermal energy locally to and from a plurality of electronic devices of an electronic system that is coupled to and positioned above the electronic circuit board.