Patent classifications
G01R31/2837
METHOD AND ARRANGEMENT FOR PERFORMING A SHUTDOWN TEST ON AN INVERTER
In order to be able to perform a shutdown test on an inverter with little expenditure, a trigger signal is modulated to the AC current or the AC voltage at a first moment, and the inverter is used at a second moment, which occurs a defined duration after the start of the trigger signal at the first moment, to generate an AC current or an AC voltage with a fault signal that is detected by the inverter and which triggers a shutdown of the inverter, and the shutdown moment of the AC current or the AC voltage is determined. A shutdown duration of the inverter is determined from the difference between the shutdown moment and the second moment.
System and Methods of Failure Prediction and Prevention for Rotating Electrical Machinery
A system for monitoring operation of rotating electrical machinery including electrical industrial machinery. The system comprises analog sensors configured to measure electrical signals corresponding to the voltage and the current of the rotating electrical machinery. A remote processor identifies the frequency components of the measured electrical signals. Based on the frequency components, the system is monitored and controlled. This may help allow electrical faults, mechanical faults and process faults to be predicted and/or prevented.
Characterizing crosstalk of a quantum computing system based on sparse data collection
Systems, computer-implemented methods, and computer program products to facilitate characterizing crosstalk of a quantum computing system based on sparse data collection are provided. According to an embodiment, a system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a package component that packs subsets of quantum gates in a quantum device into one or more bins. The computer executable components can further comprise an assessment component that characterizes crosstalk of the quantum device based on a number of the one or more bins into which the subsets of quantum gates are packed.
Electronic Control Device and Method for Diagnosing Wake-up Circuit
An electronic control device includes: a microcomputer; a wake-up circuit; and a relay switch self-retaining a power relay, and the wake-up circuit operates the relay switch in response to a wake-up signal from an OTA electronic control device, and starts power supply to the microcomputer to cause starting-up. During shutdown processing for the microcomputer, the microcomputer outputs a stop command to the relay switch before outputting a stop command to the wake-up circuit, whereby an output terminal (INH terminal) of the wake-up circuit is diagnosed for fixation based on an output signal from the wake-up circuit.
COUPLER SENSING BASED VOLTAGE-STANDING-WAVE-RATIO IMPEDANCE AND POWER DETECTOR AND METHOD
A broadband-capable coupler sensing-based VSWR resilient true power/impedance detector (also referred to as a power/impedance sensor) and method are disclosed that can be used for single-ended interfaces of individual phased array elements of a phased array antenna, e.g., large-scaled integrated phased-arrays. The true power and impedance detectors, as Built-in-Self-Test circuitries, may each employ an in situ load invariant power and impedance sensor to provide true measurements of power and impedance that can be used to detect and/or monitor for VSWR variations and/or variations in the antenna driving impedance due to antenna element coupling and/or other effects. The measured power and impedance output(s) of each BIST circuitry can then be used to adjust or drive respective passive or active tuning circuitry, e.g., in the power amplifier or other front-end circuitries of the phased array antenna, for performance recovery (or optimization) of a respective array element.
Method and device for measuring characteristics of RF chains
A measuring device may include: a signal generator for generating a test signal; and a measurement control unit that inputs the generated test signal to a radio frequency (RF) chain including at least one circuit element, detects output signals of a first diode, a second diode, and a third diode which receive, as input signals, signals generated on the basis of a coupled signal for an input test signal of a circuit element of the at least one circuit element and a coupled signal for an output test signal of the circuit element, and measures an S-parameter for the circuit element on the basis of a component signal of the third frequency in the output signal of the first diode, a component signal of the third frequency in the output signal of the third diode, and the output signal of the second diode.
SENSOR DEVICE FOR DETECTING ELECTRICAL DEFECTS BASED ON RESONANCE FREQUENCY
A sensor device is provided for detecting electrical defects in a device under test (DUT). The sensor device includes a signal line configured to conduct a stimulus signal through a first conductor in the DUT; an inductor connected in series with the signal line for providing an inductance; and a ground line arranged adjacent to the signal line and configured to provide a ground path through a second conductor in the DUT for the stimulus signal conducted through the signal line and the first conductor. A resonance frequency for the signal line is determined based on the inductance and an effective capacitance of the signal line generated in response to the stimulus signal. An increase in the resonance frequency indicates an open defect in the first conductor and/or the second conductor, and a decrease in the resonance frequency indicates a short defect between the first conductor and the second conductor.
TEST METHOD AND SYSTEM
A test method is configured to test a chip on a circuit under test, wherein the circuit under test further includes a DC-DC converter. The test method includes the operations of: generating a test pulse signal; filtering the test pulse signal to generate a first test DC voltage to the DC-DC converter, wherein the DC-DC converter transforms the first test DC voltage to a second test DC voltage and transmits the second test DC voltage to the chip; and extracting an output signal of the chip to determine a performance of the chip, wherein the chip generates the output signal according to the second test DC voltage.
Lifetime estimating system and method for heating source, and inspection apparatus
A lifetime estimation system for estimating a lifetime of a heating source is provided in an apparatus for heating a target object using the heating source and performing a feedback control of a target object temperature using a temperature controller based on a temperature measurement value of the target object measured by a temperature measuring device. The temperature controller controls a power supplied to the heating source and performs a temperature control using a state space model to perform the feedback control of the temperature of the target object. The lifetime estimation system includes a temperature monitor unit that monitors the temperature measurement value of the target object, a hunting amount detection unit that detects a hunting amount in a stable region of the monitored temperature of the target object, and a lifetime estimation unit that estimates a lifetime of the heating source from the detected hunting amount.
Safety rated input module for an industrial controller
A system and method for detecting a failure in a redundant signal path during operation of the redundant path is disclosed. A test signal is sequentially injected into each signal path while an input signal is conducted by the other signal path not receiving the test signal. The test signal is selected at a frequency to verify operation of a filter connected in series along each path. A processor generates the test signal, injects the test signal at the input of the filter, and receives the output of the filter. The processor then generates a frequency response of the filter in each signal path as a function of the output from the filter and of the original test signal. The frequency response obtained along each of the redundant signal paths is compared to each other to detect a failure of one of the filters present along the respective signal paths.