A system and method for monitoring a circuit for impending failure includes measuring changes to frequency-domain impedance with a pair of analog-to-digital converters connected to a conductor while powering up, with or without interposing a series sense resistor for measuring applied current. Changes to frequency-domain impedance or power delivery voltage ratio are identified via a neural network trained to identify frequency-domain impedance associated with normal system behavior and general system failure mode. The neural network may be further trained to produce a predictive probability of specific failure mode types.

A method for measuring electrical response of a DUT includes using a measurement instrument, generating a radio frequency (RF) test signal via the measurement instrument at one or more initial frequencies, propagating the RF test signal at the one or more initial frequencies to the DUT, measuring a response of the DUT at the one or more initial frequencies and aggregating the measured response of the DUT at the one or more initial frequencies as response measurement data. The method then includes iteratively performing, until characterization of the DUT achieves a minimum criterion, the steps of adaptively selecting an additional frequency at which to generate a RF test signal based on the response measurement data based on a predetermined adaptive frequency algorithm, generating the RF test signal at the adaptively selected additional frequency, measuring a response of the DUT at the adaptively selected additional frequency, and adding the measured response of the DUT at the adaptively selected additional frequency to the response measurement data.

A test system, a method for manufacturing an electronic device, and a method for testing a wafer or electronic device that includes coupling a transistor in a series circuit with a capacitor and a resistor, coupling a voltage source to the capacitor to charge the capacitor to a non-zero DC voltage while the transistor is turned off, disconnecting the voltage source from the capacitor while the transistor is turned off, turning the transistor on while the voltage source is disconnected from the capacitor, measuring a voltage signal across the resistor while the transistor is turned on, and determining a test result indicating whether the transistor has an acceptable dynamic on-state resistance according to the voltage signal across the resistor.

The present disclosure provides for an electronic sensor for detecting a root of a plant in soil, the electronic sensor that includes a first conductor plate configured to be disposed in soil, a switch, a power supply, and a signal extractor. The switch is electrically coupled to the first conductor plate and is configured to switch between a first mode and a second mode. The power supply is electrically coupled to the switch and is configured to provide an electrical charge to the first conductor plate in the first mode of the switch. The signal extractor is electrically coupled to the switch and is configured to extract a signal response at the first conductor plate in the second mode of the switch. The present disclosure further provides a second conductor plate configured to be disposed in soil adjacent to and substantially parallel to the first conductor plate. The second conductor plate is electrically coupled to ground.

The present disclosure provides for an electronic sensor for detecting a root of a plant in soil, the electronic sensor that includes a first conductor plate configured to be disposed in soil, a switch, a power supply, and signal extractor. The switch is electrically coupled to the first conductor plate and is configured to switch between a first mode and a second mode. The power supply is electrically coupled to the switch and is configured to provide an electrical charge to the first conductor plate in the first mode of the switch. The signal extractor is electrically coupled to the switch and is configured to extract a signal response at the first conductor plate in the second mode of the switch. The present disclosure further provides a second conductor plate configured to be disposed in soil adjacent to and substantially parallel to the first conductor plate. The second conductor plate is electrically coupled to ground.

In a test system that provides a high fidelity output signal, a transition driving circuit can selectively enable multiple, parallel current paths based on a desired voltage transition. The transition driving circuit can include a first switch configured to switch a first current path between an output node and a first current source/sink, and a second switch configured to switch a second current path between the output node and the first current source/sink. The transition driving circuit can include a control circuit that is configured to receive information about a desired voltage transition and, depending on a magnitude of the desired voltage transition, to selectively turn on one or both of the first and second switches to enable one or both of the first and second current paths to provide respective portions of the output signal from the first current source/sink to the output node of the test system.

The present application provides two-port on-wafer calibration piece circuit models and a method for determining parameters. The method includes: measuring a single-port on-wafer calibration piece circuit model corresponding to a first frequency band to obtain a first S parameter; calculating, according to the first S parameter, an intrinsic capacitance value of a two-port on-wafer calibration piece circuit model corresponding to the single-port on-wafer calibration piece circuit model; measuring the two-port on-wafer calibration piece circuit model corresponding to the terahertz frequency band to obtain a second S parameter; and calculating a parasitic capacitance value and a parasitic resistance value of the two-port on-wafer calibration piece circuit model according to the second S parameter and the intrinsic capacitance value.

A measurement system for determining a phase and amplitude influence of a device under test, comprising a measurement instrument having a signal generator, a local oscillator, a first mixer and an analysis unit is disclosed. The signal generator is configured to generate a source signal with a predetermined source frequency and a source phase, and to forward the source signal to the device under test, wherein the source signal is altered by the device under test in at least one of amplitude and phase, such that a measurement signal is generated and forwarded to the first mixer. The local oscillator is configured to generate a local oscillator signal with a predetermined local oscillator frequency and a local oscillator phase, and to forward the local oscillator signal to the first mixer. The first mixer is configured to mix the measurement signal and the local oscillator signal, thereby generating a first mixer signal. The analysis unit is located downstream of the first mixer and is configured to analyze the first mixer signal or a processed version of the first mixer signal. The measurement instrument is configured to perform at least two measurements of the phase and amplitude influence of the device under test by analyzing the first mixer signal or the processed version of the first mixer signal, wherein at least one of the source phase and the local oscillator phase is altered between the at least two measurements.

An inspection system may include a controller communicatively coupled to one or more in-line sample analysis tools including, but not limited to, an inspection tool or a metrology tool. The controller may identify defects in a population of dies based on data received from at least one of the one or more in-line sample analysis tools, assign weights to the identified defects indicative of predicted impact of the identified defects on reliability of the dies using a weighted defectivity model, generate defectivity scores for the dies in the population by aggregating the weighted defects in the respective dies in the population, and determine a set of outlier dies based on the defectivity scores for the dies in the population, wherein at least some of the set of outlier dies are isolated from the population.

A method of identifying cell-internal defects: obtaining a circuit design of an integrated circuit, the circuit design including netlists of one or more cells coupled to one another; identifying the netlist corresponding to one of the one or more cells; injecting a defect to one of a plurality of circuit elements and one or more interconnects of the cell; retrieving a first current waveform at a location of the cell where the defect is injected by applying excitations to inputs of the cell; retrieving, without the defect injected, a second current waveform at the location of the cell by applying the same excitations to the inputs of the cell; and selectively annotating, based on the first current waveform and the second current waveform, an input/output table of the cell with the defect.