A semiconductor inspecting method according to an embodiment includes a step of scanning a semiconductor device with laser light to acquire characteristic information indicative of characteristics of an electrical signal of the semiconductor device in response to irradiation with the laser light for each of irradiation positions of the laser light and to generate a first pattern image of the semiconductor device based on characteristic information for each of irradiation positions, a step of generating a second pattern image of the semiconductor device based on a layout image of the semiconductor device and current path information indicative of a current path in the semiconductor device, and a step of acquiring matching information indicative of a relative relationship between the first pattern image and the layout image based on a result of positional alignment between the first pattern image and the second pattern image.

An inspection apparatus includes: a first probe including a receiver antenna configured to detect the terahertz wave emitted by an inspection signal source and that has passed through the wafer, wherein the first probe includes: a first probe tip in which the receiver antenna is embedded, the receiver antenna including a first photoconductive switch; a first printed circuit board on which the first probe tip is mounted; a first optical bracket coupled to the first printed circuit board; a first optical connector configured to transmit a first laser beam into the first probe, and coupled to the first optical bracket, wherein the first laser beam is configured to excite the first photoconductive switch.

An inspection apparatus includes: a first probe including a receiver antenna configured to detect the terahertz wave emitted by an inspection signal source and that has passed through the wafer, wherein the first probe includes: a first probe tip in which the receiver antenna is embedded, the receiver antenna including a first photoconductive switch; a first printed circuit board on which the first probe tip is mounted; a first optical bracket coupled to the first printed circuit board; a first optical connector configured to transmit a first laser beam into the first probe, and coupled to the first optical bracket, wherein the first laser beam is configured to excite the first photoconductive switch.

A system may include a wafer that includes ICs and defines cavities. Each cavity may be formed in a BEOL layer of the wafer and proximate a different IC. The system may also include an interposer that includes a transparent layer configured to permit optical signals to pass through. The interposer may also include at least one waveguide located proximate the transparent layer. The at least one waveguide may be configured to adiabatically couple at least one optical signal out of the multiple ICs. Further, the interposer may include a redirecting element optically coupled to the at least one the waveguide. The redirecting element may be located proximate the transparent layer and may be configured to receive the at least one optical signal from the at least one waveguide. The redirecting element may also be configured to vertically redirect the at least one optical signal towards the transparent layer.

A system may include a wafer that includes ICs and defines cavities. Each cavity may be formed in a BEOL layer of the wafer and proximate a different IC. The system may also include an interposer that includes a transparent layer configured to permit optical signals to pass through. The interposer may also include at least one waveguide located proximate the transparent layer. The at least one waveguide may be configured to adiabatically couple at least one optical signal out of the multiple ICs. Further, the interposer may include a redirecting element optically coupled to the at least one the waveguide. The redirecting element may be located proximate the transparent layer and may be configured to receive the at least one optical signal from the at least one waveguide. The redirecting element may also be configured to vertically redirect the at least one optical signal towards the transparent layer.

In an approach to inspecting integrated circuits, a system includes a first detection system and a second detection system for measuring electroluminescent (EL) images from a device under test (DUT); and a controller. The controller is configured to: measure EL emissions from the DUT with the first and the second detection systems to obtain a first and a second EL test data; compare the first and the second EL test data to a reference model of a reference device, the reference model developed based on measured EL reference data, synthetic EL reference data, or a combination thereof obtained from the reference device or a reference design of the reference device; and determine whether the DUT is in accordance with the reference device, based at least in part on the comparison of the first and the second EL test data to the reference model of the reference device.

In an approach to inspecting integrated circuits, a system includes a first detection system and a second detection system for measuring electroluminescent (EL) images from a device under test (DUT); and a controller. The controller is configured to: measure EL emissions from the DUT with the first and the second detection systems to obtain a first and a second EL test data; compare the first and the second EL test data to a reference model of a reference device, the reference model developed based on measured EL reference data, synthetic EL reference data, or a combination thereof obtained from the reference device or a reference design of the reference device; and determine whether the DUT is in accordance with the reference device, based at least in part on the comparison of the first and the second EL test data to the reference model of the reference device.

An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.

An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.

A semiconductor inspection device includes: a measuring device that supplies power to a semiconductor device and measures the electrical characteristics; an optical scanning device that scans the semiconductor device with light intensity-modulated with a plurality of frequencies; a lock-in amplifier that acquires a characteristic signal indicating the electrical characteristics of the plurality of frequency components; and an inspection device that calculates a frequency at which the characteristic signal reflecting the electrical characteristics of a first layer and the characteristic signal reflecting the electrical characteristics of a second layer have a predetermined phase difference, corrects a phase component of the characteristic signal at an arbitrary scanning position with a phase component at the scanning position reflecting the electrical characteristics of the first layer as a reference, and outputs an in-phase component and a quadrature component at the arbitrary scanning position at the calculated frequency.