Patent classifications
G01R31/311
PRECISION PROBE POSITIONING FOR AT-SPEED INTEGRATED CIRCUIT TESTING USING THROUGH SILICON IN-CIRCUIT LOGIC ANALYSIS
A method, system, and computer program product for precision probe positioning and testing of an integrated circuit. Methods, systems, and a computer program product implement techniques for determining a particular area of interest for precision probe positioning and testing where the particular area of interest comprises an area less than an entire area of the integrated circuit. Once the particular area of interest for testing has been determined, then a laser probe is steered or otherwise directed to illuminate a plurality of pixels within the area of interest so as to generate reflected signals corresponding to the illuminated pixels. Techniques are provided for measuring the reflected signals to determine information about the IC within the area of interest. CAD data or user data can be used to determine XY addressable pixel locations within the area of interest.
ANALYSIS SYSTEM AND ANALYSIS METHOD
A heat source position inside a measurement object is identified with high accuracy by improving time resolution.
An analysis system according to the present invention is an analysis system that identifies a heat source position inside a measurement object, and includes a condition setting unit that sets a measurement point for one surface of the measurement object, a tester that applies a stimulation signal to the measurement object, a light source that irradiates the measurement point of the measurement object with light, a photo detector that detects light reflected from a predetermined measurement point on the surface of the measurement object according to the irradiation of light and outputs a detection signal, and an analysis unit that derives a distance from the measurement point to the heat source position based on the detection signal and the stimulation signal and identifies the heat source position.
Semiconductor device and wafer with reference circuit and related methods
A semiconductor device may include a semiconductor wafer, and a reference circuit carried by the semiconductor wafer. The reference circuit may include optical DUTs, a first set of photodetectors coupled to outputs of the optical DUTs, an optical splitter coupled to inputs of the optical DUTs, and a second set of photodetectors coupled to the optical splitter. The optical splitter is to be coupled to an optical source and configured to transmit a reference optical signal to the first set of photodetectors via the optical DUTs and the second set of photodetectors.
OPTO ELECTRICAL TEST MEASUREMENT SYSTEM FOR INTEGRATED PHOTONIC DEVICES AND CIRCUITS
An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
OPTO ELECTRICAL TEST MEASUREMENT SYSTEM FOR INTEGRATED PHOTONIC DEVICES AND CIRCUITS
An optical testing circuit on a wafer includes an optical input configured to receive an optical test signal and photodetectors configured to generate corresponding electrical signals in response to optical processing of the optical test signal through the optical testing circuit. The electrical signals are simultaneously sensed by a probe circuit and then processed. In one process, test data from the electrical signals is simultaneously generated at each step of a sweep in wavelength of the optical test signal and output in response to a step change. In another process, the electrical signals are sequentially selected and the sweep in wavelength of the optical test signal is performed for each selected electrical signal to generate the test data.
AUTOMATED TEST AND MEASUREMENT SYSTEM WITH MAGNETIC FIELD DETECTION
An automated circuit test system includes a magnetic sensor array configured to measure, at a plurality of locations, a magnetic field induced by a circuit under test. A circuit drive module can energize the circuit under test to induce the magnetic field. Optionally, the circuit drive module detects an electrical response from the circuit under test. Optionally, magnetic field data is combined with electrical response data prior to outputting the test result.
Defect isolation methods and systems
A test system and method for testing integrated circuits with improved defect localization is disclosed. A laser is used to perturb a device under test (DUT) at a test location. A tester tests the DUT with a test pattern and compares test results with compare vectors in a prior failure log. When a failure signature is matched, a failure signal is generated, indicating that the test location is a failed location. Comparing the test results with the compare vectors in the prior failure log and generating the failure signal when the failure signature is detected reduces artifacts from testing, shortening debug turnaround time.
Defect isolation methods and systems
A test system and method for testing integrated circuits with improved defect localization is disclosed. A laser is used to perturb a device under test (DUT) at a test location. A tester tests the DUT with a test pattern and compares test results with compare vectors in a prior failure log. When a failure signature is matched, a failure signal is generated, indicating that the test location is a failed location. Comparing the test results with the compare vectors in the prior failure log and generating the failure signal when the failure signature is detected reduces artifacts from testing, shortening debug turnaround time.
SEMICONDUCTOR SAMPLE INSPECTION DEVICE AND INSPECTION METHOD
In an inspection device, the reference signal output section is connected to an external power supply device in electrical parallel with a semiconductor sample, and outputs a reference signal according to the output of the external power supply device. The removal processing section performs, based on the reference signal, processing for removing a noise component, which is due to the output of the external power supply device from the current signal output from the semiconductor sample and outputs a processing signal. The electrical characteristic measurement section measures the electrical characteristics of the semiconductor sample based on the processing signal. The processing signal is subjected to the removal processing performed based on the reference signal from the reference signal output section for which the value of the gain has been set by the gain setting section.
SEMICONDUCTOR SAMPLE INSPECTION DEVICE AND INSPECTION METHOD
In an inspection device, the reference signal output section is connected to an external power supply device in electrical parallel with a semiconductor sample, and outputs a reference signal according to the output of the external power supply device. The removal processing section performs, based on the reference signal, processing for removing a noise component, which is due to the output of the external power supply device from the current signal output from the semiconductor sample and outputs a processing signal. The electrical characteristic measurement section measures the electrical characteristics of the semiconductor sample based on the processing signal. The processing signal is subjected to the removal processing performed based on the reference signal from the reference signal output section for which the value of the gain has been set by the gain setting section.