A Distributed Feedback Laser (DFB) mounted on a Silicon Photonic Integrated Circuit (Si PIC), the DFB having a longitudinal length which extends from a first end of the DFB laser to a second end of the DFB laser, the DFB laser comprising: an epi stack, the epi stack comprising: one or more active material layers; a layer comprising a partial grating, the partial grating extending from the second end of the DFB laser, only partially along the longitudinal length of the DFB laser such that it does not extend to the first end of the DFB laser; a highly reflective medium located at the first end of the DFB laser; and a back facet located at the second end of the DFB laser.

A single chip including an optoelectronic device on the semiconductor layer in a first region, the optoelectronic device comprises a bottom cladding layer, an active region, and a top cladding layer, wherein the bottom cladding layer is above and in direct contact with the semiconductor layer, the active region is above and in direct contact with the bottom cladding layer, and the top cladding layer is above and in direct contact with the active region, a silicon device on the substrate extension layer in a second region, a device insulator layer substantially covering both the optoelectronic device in the first region and the silicon device in the second region, and a waveguide embedded within the device insulator layer in direct contact with a sidewall of the active region of the optoelectronic device.

A first photonic die has a first coupling edge and a first die surface, and comprises: a first waveguide extending in proximity to the first coupling edge; a portion of the first die surface forming an alignment edge substantially parallel to the first waveguide; and a first alignment feature etched into or formed adjacent to the first coupling edge. A second photonic die has a second coupling edge and a second die surface, and comprises: a second waveguide extending in proximity to the second coupling edge; a portion of the second die surface configured to form a receptacle sized to constrain a position of the alignment edge; and a second alignment feature etched into or formed adjacent to the second coupling edge and configured to enable alignment with the first alignment feature when the first photonic die and the second photonic die are substantially aligned with each other.

A silicon-photonic integrated circuit comprising a direct-bandgap-semiconductor-based active optical device that is epitaxially grown on an indirect-bandgap SOI substrate (108) is disclosed. The structure of the active optical device includes an active region (120) having quantum dots (206) made of InGaAs that are embedded in one or more confinement layers (n-InP, p-InP), where the bandgap of the confinement layers is higher than that of the quantum dots. Further the confinement-layer material is preferably lattice matched to the quantum dot material in order to suppress associated crystalline defects within the material are located away from the center of its bandgap such that they suppress recombination-enhanced defect-reaction-driven degradation of the active optical device. The active optical device is epitaxially grown on a handle substrate of an SOI substrate that has a surface waveguide formed in its device layer, where the active region and the surface waveguide are at the same height above the handle wafer surface.

A semiconductor device including a substrate structure including a semiconductor material layer that is present directly on a buried dielectric layer in a first portion of the substrate structure and an isolation dielectric material that is present directly on the buried dielectric layer in a second portion of the substrate structure. The semiconductor device further includes a III-V optoelectronic device that is present in direct contact with the isolation dielectric material in a first region of the second portion of the substrate structure. A dielectric wave guide is present in direct contact with the isolation dielectric material in a second region of the second portion of the substrate structure.

A photonic integrated circuit including first and second opto-electronic devices that are fabricated on a semiconductor wafer having an epitaxial layer stack including an n-type indium phosphide-based contact layer that is provided with at least one selectively p-type doped tubular-shaped region for providing an electrical barrier between respective n-type contact regions of the first and second opto-electronic devices that are optically interconnected by a passive optical waveguide that is fabricated in a non-intentionally doped waveguide layer including indium gallium arsenide phosphide, the non-intentionally doped waveguide layer being arranged on top of the n-type contact layer, wherein a first portion of the at least one selectively p-type doped tubular-shaped region is arranged underneath the passive optical waveguide between the first and second opto-electronic devices. An opto-electronic system including the photonic integrated circuit.

A semiconductor integrated optical device includes: a supporting base including semi-insulating semiconductor; a first photoelectric convertor having first photodiode mesas; a second photoelectric convertor having second photodiode mesas; a first 90 optical hybrid having at least one first multimode waveguide mesa; a second 90 optical hybrid having at least one second multimode waveguide mesa; an optical divider mesa; first and second input waveguide mesas coupling the first and second 90 optical hybrids with the optical divider mesa, respectively; a conductive semiconductor region disposed on the supporting base, the conductive semiconductor region mounting the first photodiode mesas, the second photodiode mesas, the first multimode waveguide mesas, the second multimode waveguide mesas, and the optical divider mesa; a first island semiconductor mesa extending between the first and second multimode waveguide mesas; and a first groove extending through the first island semiconductor mesa and the conductive semiconductor region to the semi-insulating semiconductor.

Photonically integrated normal incidence photodetectors (NIPDs) and associated in-plane waveguide structures optically coupled to the NIPDs can be configured to allow for both in-plane and normal-incidence detection. In photonic circuits with light-generation capabilities, such as integrated optical transceivers, the ability of the NIPDs to detect in-plane light is used, in accordance with some embodiments, to provide self-test functionality.

A grating coupler having first and second ends for coupling a light beam to a waveguide of a chip includes a substrate configured to receive the light beam from the first end and transmit the light beam through the second end, the substrate having a first refractive index n1, a grating structure having curved grating lines arranged on the substrate, the grating structure having a second refractive index n1, wherein the curved grating lines have line width w and height d and are arranged by a pitch , wherein the second refractive index n2 is less than first refractive index n1, and a cladding layer configured to cover the grating structure, wherein the cladding layer has a third refractive index n3.

A grating coupler having first and second ends for coupling a light beam to a waveguide of a chip includes a substrate configured to receive the light beam from the first end and transmit the light beam through the second end, the substrate having a first refractive index n1, a grating structure having curved grating lines arranged on the substrate, the grating structure having a second refractive index n1, wherein the curved grating lines have line width w and height d and are arranged by a pitch , wherein the second refractive index n2 is less than first refractive index n1, and a cladding layer configured to cover the grating structure, wherein the cladding layer has a third refractive index n3.