The invention relates to a process for fabricating a photonic chip (1) comprising steps of transferring a die to an actual transfer region Zr.sub.e of the receiving substrate (20) comprising a central region Zc entirely covered by the die and a peripheral region Zp having a free surface (25), a first waveguide lying solely in the central region Zc, and a second waveguide lying in the peripheral region Zp; depositing an etch mask (31) on a segment of the die (10) and around the actual transfer region Zr.sub.e; and dry etching a free segment of the die (10), the free surface (25) of the peripheral region Zp then being partially etched.

Aspects described herein include a method comprising bonding a photonic wafer with an electronic wafer to form a wafer assembly, removing a substrate of the wafer assembly to expose a surface of the photonic wafer or of the electronic wafer, forming electrical connections between metal layers of the photonic wafer and metal layers of the electronic wafer, and adding an interposer wafer to the wafer assembly by bonding the interposer wafer with the wafer assembly at the exposed surface. The interposer wafer comprises through-vias that are electrically coupled with the metal layers of one or both of the photonic wafer and the electronic wafer. The method further comprises dicing the wafer assembly to form a plurality of dies. A respective edge coupler of each die is optically exposed at an interface formed by the dicing.

Structures including a photodetector and methods of fabricating such structures. A substrate, which is composed of a semiconductor material, includes a first trench, a second trench, and a pillar of the semiconductor material that is laterally positioned between the first trench and the second trench. A first portion of a dielectric layer is located in the first trench and a second portion of the dielectric layer is located in the second trench. A waveguide core is coupled to the pillar at a top surface of the substrate.

Structures including a photodetector and methods of fabricating such structures. A substrate, which is composed of a semiconductor material, includes a first trench, a second trench, and a pillar of the semiconductor material that is laterally positioned between the first trench and the second trench. A first portion of a dielectric layer is located in the first trench and a second portion of the dielectric layer is located in the second trench. A waveguide core is coupled to the pillar at a top surface of the substrate.

The present disclosure generally relates to semiconductor detectors for use in optoelectronic/photonic devices and integrated circuit (IC) chips, and methods for forming same. The present disclosure also relates to photodetectors integrated with waveguide stacks, more particularly, photodetectors with butt-end coupled waveguides. The present disclosure also relates to methods of forming such structures.

The present disclosure generally relates to semiconductor detectors for use in optoelectronic/photonic devices and integrated circuit (IC) chips, and methods for forming same. The present disclosure also relates to photodetectors integrated with waveguide stacks, more particularly, photodetectors with butt-end coupled waveguides. The present disclosure also relates to methods of forming such structures.

A system and method for packing optical and electronic components. A module includes an electronic integrated circuit and a plurality of photonic integrated circuits, connected to the electronic integrated circuit by wire bonds or by wire bonds and other conductors. A metal cover of the module is in thermal contact with the electronic integrated circuit and facilitates extraction of heat from the electronic integrated circuit. Arrays of optical fibers are connected to the photonic integrated circuits.

Systems and methods are provided for processing an optical signal. An example system may include a source disposed on a substrate and capable of emitting the optical signal. A first waveguide is formed in the substrate to receive the optical signal. A first coupler is disposed on the substrate to receive a reflected portion of the optical signal. A second waveguide is formed in the substrate to receive the reflected portion from the first coupler. A second coupler is formed in the substrate to mix the optical signal and the reflected portion to form a mixed signal. Photodetectors are formed in the substrate to convert the mixed signal to an electrical signal. A processor is electrically coupled to the substrate and programmed to convert the electrical signal from a time domain to a frequency domain to determine a phase difference between the optical signal and the reflected portion.

A photonic integrated circuit chip includes vertical grating couplers defined in a first layer. Second insulating layers overlie the vertical grating coupler and an interconnection structure with metal levels is embedded in the second insulating layers. A cavity extends in depth through the second insulating layers all the way to an intermediate level between the couplers and the metal level closest to the couplers. The cavity has lateral dimensions such that the cavity is capable of receiving a block for holding an array of optical fibers intended to be optically coupled to the couplers.

An optoelectronic device and method of manufacturing the same. The device includes: a layer disposed above a substrate, the layer having a first cavity therein, which cavity is at least partially defined by an inclined interface between the cavity and an insulating liner, the interface being disposed at an angle relative to the substrate of greater than 0 and less than or equal to 90; and a regrown semiconductor material, providing or forming a part of a waveguide, the regrown semiconductor material being at least partly disposed in the first cavity and including an inclined interface between the regrown semiconductor material and the insulating liner, the interface being disposed at an angle relative to the substrate of greater than 0 and less than or equal to 90.