A cavity substrate may have a directional optoelectronic transmission channel. The cavity substrate includes a support frame, a first dielectric layer on a first surface of the support frame, and a second dielectric layer on a second surface of the support frame. The support frame, the first dielectric layer and the second dielectric layer constitute a closed cavity having an opening on one side in the length direction of the substrate, a first circuit layer is arranged on the inner surface of the first dielectric layer facing the cavity, an electrode connected with an optical communication device is arranged on the first circuit layer, the electrode is electrically conducted with the first circuit layer, a second circuit layer is arranged on the outer surfaces of the first dielectric layer and the second dielectric layer, and the first circuit layer and the second circuit layer are communicated through a via column.

A photonic integrated circuit (PIC) die includes a silicon nitride optical component over an active region. Multiple interconnect layers are over the silicon nitride optical component, each of the multiple interconnect layers including a metal interconnect therein. At least one optical deflector is over the multiple interconnect layers and over the silicon nitride optical component. The optical deflector(s) may also include a contact passing therethrough to the interconnect layers, but do not include any other electrical interconnects. Each optical deflector may deflect light within an ambient light range of less than 570 nanometers (nm) to protect the silicon nitride optical component from light-induced degradation.

An embodiment device includes: a first dielectric layer; a first photonic die and a second photonic die disposed adjacent a first side of the first dielectric layer; a waveguide optically coupling the first photonic die to the second photonic die, the waveguide being disposed between the first dielectric layer and the first photonic die, and between the first dielectric layer and the second photonic die; a first integrated circuit die and a second integrated circuit die disposed adjacent the first side of the first dielectric layer; conductive features extending through the first dielectric layer and along a second side of the first dielectric layer, the conductive features electrically coupling the first photonic die to the first integrated circuit die, the conductive features electrically coupling the second photonic die to the second integrated circuit die; and a second dielectric layer disposed adjacent the second side of the first dielectric layer.

Thermal isolation elements are provided in wafer-bonded silicon photonics that include a photonic platform, including a heating element and an optical waveguide that are disposed between a first surface and a second surface (opposite to the first surface) of the photonic platform; a substrate, including a third surface and a fourth surface (opposite to the third surface); wherein the first surface of the photonic platform is bonded to the third surface of the substrate; and wherein a cavity is defined by a trench in one or more of: the first surface and extending towards, but not reaching, the second surface, and the third surface and extending towards, but not reaching, the fourth surface; wherein the cavity is filled with a gas of a known composition at a predefined pressure; and wherein the cavity is aligned with the optical waveguide and the heating element.

An optical device includes a first substrate, a second substrate, a plurality of separation walls, one or more optical waveguides, and one or more spacers. The first substrate has a surface which extends in a first direction and a second direction intersecting the first direction. The second substrate faces the first substrate. The plurality of separation walls are positioned between the first substrate and the second substrate and extend in the first direction. The one or more optical waveguides are positioned between the first substrate and the second substrate and include one or more dielectric members which are positioned between the plurality of separation walls and which extend in the first direction. The one or more spacers are directly or indirectly sandwiched between the first substrate and the second substrate and positioned around the one or more optical waveguides.

A photonic integrated circuit chip includes vertical grating couplers defined in a first layer. Second insulating layers overlie the vertical grating coupler and an interconnection structure with metal levels is embedded in the second insulating layers. A cavity extends in depth through the second insulating layers all the way to an intermediate level between the couplers and the metal level closest to the couplers. The cavity has lateral dimensions such that the cavity is capable of receiving a block for holding an array of optical fibers intended to be optically coupled to the couplers.

There is set forth herein an optoelectrical device, comprising: a substrate; an interposer dielectric stack formed on the substrate, the interposer dielectric stack including a base interposer dielectric stack, a photonics device dielectric stack, and a bond layer that integrally bonds the photonics device dielectric stack to the base interposer dielectric stack. There is set forth herein a method comprising building an interposer base structure on a first wafer having a first substrate, including fabricating a plurality of through vias in the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layers; and building a photonics structure on a second wafer having a second substrate, including fabricating one or more photonics devices within a photonics device dielectric stack formed on the second substrate.

Embodiments herein include an optical system that passively aligns a fiber array connector (FAC) to a waveguide in a photonic chip. A substrate of the FAC is machined or etched to include multiple grooves along a common axis or plane to hold optical waveguides, or more specifically, the fibers of the optical cables in the FAC. To align the fibers to the photonic chip, one of the fibers is disposed in an alignment trench which has a width that is substantially the same as the diameter of the fiber. When the fiber registers with the alignment trench, the fiber is aligned with a waveguide disposed at the end of the trench. Because the pitch between the fibers can be precisely controlled, aligning one of the fibers using the alignment trench results in the other fibers becoming passively aligned to respective waveguides in the photonic chip.

End-face coupling structures within an electrical backend are provided via photonic integrated circuit (PIC), comprising: a first plurality of spacer layers; a second plurality of etch-stop layers, wherein each etch-stop layer of the second plurality of etch-stop layers is located between two spacer layers of the first plurality of spacer layers; and an optical coupler comprising a plurality of waveguides arranged as a waveguide array configured to receive an optical signal in a direction of travel, wherein each waveguide of the plurality of waveguides is located at a layer interface defined between an etch-stop layer and a spacer layer. Portions of the PIC can be formed by depositing layers of spacer and etch-stop materials in which cavities are formed to define the waveguides when the waveguide material is deposited or interconnects when a metal is deposited therein.

Techniques and mechanisms for providing efficient direction of light to a photodetector with a tapered waveguide structure. In an embodiment, a taper structure of a semiconductor device comprises a substantially single crystalline silicon. A buried oxide underlies and adjoins the monocrystalline silicon of the taper structure, and a polycrystalline Si is disposed under the buried oxide. During operation of the semiconductor device light is redirected in the taper structure and received via a first side of a Germanium photodetector. In another embodiment, one or more mirror structures positioned on a far side of the Germanium photodetector may provide for a portion of the light to be reflected back to the Germanium photodetector.