Provided is a photodetector which can be manufactured in a standard process of a mass-produced CMOS foundry. The photodetector includes a silicon (Si) substrate; a lower clad layer; a core layer including a waveguide layer configured to guide signal light, and including a first Si slab doped with first conductive impurity ions and a second Si slab doped with second conductive impurity ions; a germanium (Ge) layer configured to absorb light and including a Ge region doped with the first conductive impurity ions; an upper clad layer; and electrodes respectively connected to the first and second Si slabs and the Ge region. A region of the core layer sandwiched between the first Si slab and the second Si slab operates as an amplification layer.

Examples described herein relate to an optical device with an integrated light-emitting structure to generate light and a waveguide integrated capacitor to monitor light. The light-emitting structure may emit light upon the application of electricity to the optical device. The waveguide integrated capacitor may be formed under the light-emitting structure to monitor the light emitted by the light-emitting structure. The waveguide integrated capacitor includes a waveguide region carrying at least a portion of the light. The waveguide region includes one or more photon absorption sites causing the generation of free charge carriers relative to an intensity of the light confined in the waveguide region resulting in a change in the conductance of the waveguide region.

A microLED may be used to generate light for intra-chip or inter-chip communications. The microLED, or an active layer of the microLED, may be embedded in a waveguide. The waveguide may include a lens.

An apparatus for monitoring strain in an optical chip in silicon photonics platform. The apparatus includes a silicon photonics substrate shared with the optical chip. Additionally, the apparatus includes an optical input configured in the silicon photonics substrate to supply an input signal of a single wavelength. The apparatus further includes a first waveguide arm and a second waveguide arm embedded in the silicon photonics substrate to form an on-chip interferometer. The second waveguide arm forms a delay line being disposed at a region in or adjacent to the optical chip. The on-chip interferometer is configured to generate an interference pattern serving as an indicator of strain distributed at the region in or adjacent to the optical chip. The interference pattern is caused by a temperature-independent phase shift at the single wavelength of the interferometer between the first waveguide arm and the second waveguide arm.

A deformable mirror and capacitive array controller is capable of controlling a plurality of individual actuators by applying independent voltages from 0V to 240V to each actuator. The device utilizes a distributed microcontroller (MCU) architecture, including a main microcontroller and a plurality of slave microcontrollers to maximize actuator voltage refresh rate. One Slave MCU may be used for up to 384 actuators. For maximizing actuator refresh rate, each Slave MCU may be limited to 192 actuators. The final circuit stage includes a digital/analog converter, a voltage sample and hold and a high voltage amplifier, all packaged in a single integrated circuit. These integrated circuits are referred hereinafter as HV S&H (high voltage sample and hold). A flexible, stacked PCB assembly significantly reduces overall footprint and weight compared to conventional devices. The device's power consumption is nearly an order of magnitude less than that of a conventions adaptive optical system.

The present disclosure relates to semiconductor structures and, more particularly, to electrical and optical via connections on a same chip and methods of manufacture. The structure includes an optical through substrate via (TSV) comprising an optical material filling the TSV. The structure further includes an electrical TSV which includes a liner of the optical material and a conductive material filling remaining portions of the electrical TSV.

A silicon photonics integrated chip includes the transmit-input waveguide unit, the splitter unit, the modulator unit, the transmit-output waveguide unit, the receive-input waveguide unit and the receiving detector unit integrated inside the chip. A silicon photonics multi-channel parallel optical component and a coupling method of the silicon photonics multi-channel parallel optical component are also provided. The integrated silicon photonics chip is adopted, the transmitting part still uses two-way DC laser group, the receiving chip is integrated inside the silicon photonics chip, and the optical interface adopts the mature FA-MPO in the industry. It has the advantages of mature technology, high degree of integration, relatively low cost, fewer coupling processes, etc., it is one of the advantageous choices for rates above 400 G.

The fabrication of a first waveguide made of stoichiometric silicon nitride, of a second waveguide made of crystalline semiconductor material and of at least one active component optically coupled to the first waveguide via the second waveguide. The method includes: a) the formation of an aperture which passes through an encapsulation layer of the first waveguide and emerges in or on a substrate made of monocrystalline silicon, then b) the deposition by epitaxial growth of a crystalline seeding material inside the aperture until this crystalline seeding material forms a crystalline seed on a top face of the encapsulation layer, then c) a lateral epitaxy, of a crystalline semiconductor material from the crystalline seed formed to form a layer made of crystalline semiconductor material wherein the second waveguide is then produced.

A loss-based wavelength meter includes a first photodiode configured to measure power of monochromatic light; and a loss section having a monotonic wavelength dependency, wherein a wavelength of the monochromatic light is determined based on measurements of the first photodiode after the monochromatic light has gone through the loss section. This provides a compact implementation that may be used in integrated optics devices using silicon photonics as well as other embodiments.

Embodiments herein describe optical interposers that utilize waveguides to detect light. For example, in one embodiment, an apparatus is provided that includes an optical detector having a first layer. The first layer includes at least one of polysilicon or amorphous silicon. The first layer forms a diode that includes a p-doped region and an n-doped region. The apparatus further includes a waveguide optically coupled to the diode and disposed on a different layer than the first layer.