A photonic device includes a PCB having an integrated circuit mounted thereon, with a cap mounted to the PCB and carrying a lens positioned over the integrated circuit. The cap is formed by: an outer wall mounted to the PCB, extending upwardly from the PCB, and surrounding a portion of the integrated circuit; a first retention structure extending inwardly from the outer wall and across the integrated circuit, the first retention structure having a hole defined therein; and a second retention structure having a hole defined therein, the second retention structure being affixed within the first retention structure such that the hole in the second retention structure is axially aligned with the hole in the first retention structure. The lens is mechanically constrained within the cap between the first retention structure and the second retention structure.

A device includes a first package connected to an interconnect substrate, wherein the interconnect substrate includes conductive routing; and a second package connected to the interconnect substrate, wherein the second package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler and to a photodetector; a via extending through the substrate; an interconnect structure over the photonic layer, wherein the interconnect structure is connected to the photodetector and to the via; and an electronic die bonded to the interconnect structure, wherein the electronic die is connected to the interconnect structure.

Photonic packages and device assemblies that include photonic integrated circuits (PICs) coupled to optical lenses on lateral sides of the PICs. An example photonic package comprises a package support, an integrated circuit (IC), an insulating material, a PIC having an active side and a lateral side substantially perpendicular to the active side. At least one optical structure is on the active side. A substantial portion of the active side is in contact with the insulating material, and the PIC is electrically coupled to the package support and to the IC. The photonic package further includes an optical lens coupled to the PIC on the lateral side. In some embodiments, the photonic package further includes an interposer between the PIC or the IC and the package support.

A sensor for use in biosensing is disclosed. The sensor comprises a photonic crystal waveguide comprising a photonic crystal comprising holes in a layer of dielectric material and a waveguide in the photonic crystal. The sensor comprises at least one strip disposed on the photonic crystal waveguide, spaced apart along, and running across the photonic crystal waveguide so as to form respective strip cavities, each of the at least one strip including a respective layer of material for sensing presence of a respective analyte; and a slot running along the waveguide of the photonic crystal waveguide.

A method includes defining a first waveguide in a first region of an optical device over a first dielectric layer over a silicon on insulator (SOI) substrate of the optical device and disposing a second dielectric layer on the first waveguide and the first dielectric layer of the optical device. The method also includes defining a second region on the second dielectric layer, the first dielectric layer, and the SOI substrate. The second region includes an integrated trench structure defined in the SOI substrate. The method further includes etching the second region to form an etched second region, disposing a third dielectric layer in the etched second region, and disposing a second waveguide on at least the third dielectric layer. The second waveguide is disposed to provide an optical coupling between the second waveguide and the first waveguide.

A structure for, and method of, forming a first optoelectronic circuitry that generates an optical signal, a second optoelectronic circuitry that receives an optical signal, and a loopback waveguide that connects the output from the first optoelectronic circuitry to the second optoelectronic circuitry on an interposer substrate are described. The connected circuits, together comprising a photonic integrated circuit, are electrically tested using electrical signals that are provided via probing contact pads on the PIC die. Electrical activation of the optoelectrical sending devices and the subsequent detection and measurement of the optical signals in the receiving devices, in embodiments, provides information on the operability or functionality of the PIC on the die at the wafer level, prior to die separation or singulation, using the electrical and optical components of the PIC circuit.

Absolute temperature measurements of integrated photonic devices can be accomplished with integrated bandgap temperature sensors located adjacent the photonic devices. In various embodiments, the temperature of the active region within a diode structure of a photonic device is measured with an integrated bandgap temperature sensor that includes one or more diode junctions either in the semiconductor device layer beneath the active region or laterally adjacent to the photonic device, or in a diode structure formed above the semiconductor device layer and adjacent the diode structure of the photonic device.

Semiconductor devices and methods of forming the semiconductor devices are described herein. A method includes providing a first material layer between a second material layer and a semiconductor substrate and forming a first waveguide in the second material layer. The method also includes forming a photonic die over the first waveguide and forming a first cavity in the semiconductor substrate and exposing the first layer. Once formed, the first cavity is filled with a first backfill material adjacent the first layer. The methods also include electrically coupling an electronic die to the photonic die. Some methods include packaging the semiconductor device in a packaged assembly.

A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.

A device includes a photonic integrated circuit having an optical phased array. The optical phased array includes multiple array elements, where each array element includes (i) an antenna element configured to transmit or receive optical signals and (ii) a phase modulator configured to phase-shift the optical signals transmitted or received by the antenna element. The device also includes multiple digital register in integrated circuit (DRIIC) cells, where each DRIIC cell is associated with one of the array elements. The DRIIC cells are configured to receive digital inputs and to provide outputs to the phase modulators of the associated array elements in order to control the phase-shifts of the optical signals transmitted or received by the antenna elements based on the digital inputs.