Patent classifications
G02B2006/1213
Waveguide structures
The present disclosure relates to semiconductor structures and, more particularly, to waveguide structures with metamaterial structures and methods of manufacture. The structure includes: at least one waveguide structure; and metamaterial structures separated from the at least one waveguide structure by an insulator material, the metamaterial structures being structured to decouple the at least one waveguide structure to simultaneously reduce insertion loss and crosstalk of the at least one waveguide structure.
OPTICAL MODULE
Disclosed is an optical module, including a lower housing, an upper housing covering the lower housing, a circuit board, a first metal base, a second metal base, a silicon photonic chip, and a light emission module including a laser chip and an optical path assembly. The first metal base is disposed on one side of the upper housing. The second metal base is disposed on one side of the lower housing. The circuit board with a hollow region is disposed on the second metal base. The silicon photonic chip is disposed on the second metal base exposed from the hollow region. The laser chip is disposed on the first metal base. The optical path assembly is disposed on the first metal base and/or on the second metal base exposed from the hollow region, and guides a third optical signal emitted by the laser chip to the silicon photonic chip.
PHOTONIC DEVICES
Photonic devices including a distributed Bragg reflector (DBR) having a stack of Group III-Nitride layers and Aluminum Scandium Nitride layers.
Mechanically held polymer lenses for photonics device maintaining placement reference to die
A photonic device includes a PCB having an integrated circuit mounted thereon, with a cap mounted to the PCB and carrying a lens positioned over the integrated circuit. The cap is formed by: an outer wall mounted to the PCB, extending upwardly from the PCB, and surrounding a portion of the integrated circuit; a first retention structure extending inwardly from the outer wall and across the integrated circuit, the first retention structure having a hole defined therein; and a second retention structure having a hole defined therein, the second retention structure being affixed within the first retention structure such that the hole in the second retention structure is axially aligned with the hole in the first retention structure. The lens is mechanically constrained within the cap between the first retention structure and the second retention structure.
Fiber optic connectors and connectorized fiber optic cables that include integrated photonic optical mode field converters and related methods
Fiber optic connectors are provided that include a substrate having a groove therein, an optical fiber that is at least partly in the groove, an optical mode field converter or other focusing reflector that is positioned to receive an optical signal that is output from the optical fiber and a housing that surrounds the substrate and the optical fiber.
Loopback waveguide
A structure for, and method of, forming a first optoelectronic circuitry that generates an optical signal, a second optoelectronic circuitry that receives an optical signal, and a loopback waveguide that connects the output from the first optoelectronic circuitry to the second optoelectronic circuitry on an interposer substrate are described. The connected circuits, together comprising a photonic integrated circuit, are electrically tested using electrical signals that are provided via probing contact pads on the PIC die. Electrical activation of the optoelectrical sending devices and the subsequent detection and measurement of the optical signals in the receiving devices, in embodiments, provides information on the operability or functionality of the PIC on the die at the wafer level, prior to die separation or singulation, using the electrical and optical components of the PIC circuit.
PACKAGE, OPTICAL DEVICE, AND MANUFACTURING METHOD OF PACKAGE
A package includes a photonic integrated circuit die and an electric integrated circuit die. The photonic integrated circuit die includes a substrate and a waveguide. The substrate has a notch and the notch is occupied by air. The waveguide is disposed over the substrate. In a top view, a first portion of the waveguide is overlapped with the substrate and a second portion of the waveguide is overlapped with the notch. The electric integrated circuit die is disposed over the photonic integrated circuit die.
Waveguide structures
The present disclosure relates to semiconductor structures and, more particularly, to waveguide structures with metamaterial structures and methods of manufacture. The structure includes: at least one waveguide structure; and metamaterial structures separated from the at least one waveguide structure by an insulator material, the metamaterial structures being structured to decouple the at least one waveguide structure to simultaneously reduce insertion loss and crosstalk of the at least one waveguide structure.
STRUCTURE AND PROCESS FOR PHOTONIC PACKAGES
Semiconductor devices and methods of forming the semiconductor devices are described herein. A method includes providing a first material layer between a second material layer and a semiconductor substrate and forming a first waveguide in the second material layer. The method also includes forming a photonic die over the first waveguide and forming a first cavity in the semiconductor substrate and exposing the first layer. Once formed, the first cavity is filled with a first backfill material adjacent the first layer. The methods also include electrically coupling an electronic die to the photonic die. Some methods include packaging the semiconductor device in a packaged assembly.
LOOPBACK WAVEGUIDE
A structure for, and method of, forming a first optoelectronic circuitry that generates an optical signal, a second optoelectronic circuitry that receives an optical signal, and a loopback waveguide that connects the output from the first optoelectronic circuitry to the second optoelectronic circuitry on an interposer substrate are described. The connected circuits, together comprising a photonic integrated circuit, are electrically tested using electrical signals that are provided via probing contact pads on the PIC die. Electrical activation of the optoelectrical sending devices and the subsequent detection and measurement of the optical signals in the receiving devices, in embodiments, provides information on the operability or functionality of the PIC on the die at the wafer level, prior to die separation or singulation, using the electrical and optical components of the PIC circuit.