A structure for, and method of, forming a first optoelectronic circuitry that generates an optical signal, a second optoelectronic circuitry that receives an optical signal, and a loopback waveguide that connects the output from the first optoelectronic circuitry to the second optoelectronic circuitry on an interposer substrate are described. The connected circuits, together comprising a photonic integrated circuit, are electrically tested using electrical signals that are provided via probing contact pads on the PIC die. Electrical activation of the optoelectrical sending devices and the subsequent detection and measurement of the optical signals in the receiving devices, in embodiments, provides information on the operability or functionality of the PIC on the die at the wafer level, prior to die separation or singulation, using the electrical and optical components of the PIC circuit.

A photonic integrated circuit includes a photonic device. The photonic device includes an input region configured to receive an input signal including a plurality of multiplexed channels. The photonic device includes a metastructured dispersive region structured to partially demultiplex the input signal into an output signal and a throughput signal. The output signal includes a channel of the multiplexed channels. The throughput signal includes the remaining channels of the multiplexed channels. The photonic device includes an output region and a throughput region optically coupled with the metastructured dispersive region to receive the output signal and the throughput signal, respectively. The metastructured dispersive region includes a heterogeneous distribution of a first material and a second material that structures the metastructured dispersive region to partially demultiplex the input signal into the output signal and the throughput signal.

A device includes a first package connected to an interconnect substrate, wherein the interconnect substrate includes conductive routing; and a second package connected to the interconnect substrate, wherein the second package includes a photonic layer on a substrate, the photonic layer including a silicon waveguide coupled to a grating coupler and to a photodetector; a via extending through the substrate; an interconnect structure over the photonic layer, wherein the interconnect structure is connected to the photodetector and to the via; and an electronic die bonded to the interconnect structure, wherein the electronic die is connected to the interconnect structure.

A package includes a photonic integrated circuit die, an electric integrated circuit die, and an encapsulant. The photonic integrated circuit die includes a semiconductor substrate and a waveguide. The semiconductor substrate has a notch. The waveguide is disposed over the semiconductor substrate. A portion of the waveguide is located within a span of the notch of the semiconductor substrate. The electric integrated circuit die is disposed over and electrically connected to the photonic integrated circuit die. The encapsulant laterally encapsulates the electric integrated circuit die.

An optical coherent transceiver comprising a polarization and phase-diversity coherent receiver and a polarization and phase-diversity modulator on the same substrate interfaced by three grating couplers, one grating coupler coupling in a signal, one grating coupler coupling in a laser signal, and a third grating coupler coupling out a modulated signal.

In one aspect, a method for displaying incompatible ports at the schematic design stage comprises the following. A schematic of a photonic integrated circuit is accessed. The schematic comprises a plurality of optical components that have ports, and the optical components are connected at their ports. A processor determines the structures of the ports. Typically, the structure of a port is determined by the cross-sectional shape and the material(s) of the port. The schematic of the photonic integrated circuit is displayed, with different visual indicators for ports with different structures. For example, ports with different structures may be represented by symbols of different colors, different outlines, different fill patterns or other types of non-textual visual indicators.

Structures including a grating coupler and methods of fabricating a structure including a grating coupler. The structure includes structure includes a dielectric layer on a substrate, a first waveguide core positioned in a first level over the dielectric layer, and a second waveguide core positioned in a second level over the dielectric layer. The second level differs in elevation above the dielectric layer from the first level. The first waveguide core includes a tapered section. The structure further includes a grating coupler having a plurality of segments positioned in the second level adjacent to the second waveguide core. The segments of the grating coupler and the tapered section of the first waveguide core are positioned in an overlapping arrangement.

A method for performing an operation on an input signal includes receiving, by a multi-mode waveguide, the input signal imposed on laser light. The received input signal imposed on the laser light is propagated through the waveguide a plurality of times in a plurality of modes, the modes interfering each time they propagate through the waveguide to generate an interference pattern of the plurality of modes. Portions of the interference pattern of the plurality of modes are nonlinearly activated each time those modes propagate through the multi-mode waveguide. Portions of the activated interference pattern of the plurality of modes are output to an optical detector array in parallel with one another each time those modes propagate through the multi-mode waveguide.

Structures and methods implement an enlarged waveguide. The structure may include a semiconductor-on-insulator (SOI) substrate including a semiconductor-on-insulator (SOI) layer over a buried insulator layer over a semiconductor substrate. An inter-level dielectric (ILD) layer is over the SOI substrate. A first waveguide has a lower surface extending at least partially into the buried insulator layer, which allows vertical enlargement of the waveguide, without increasing the thickness of the ILD layer or increasing the length of interconnects to other devices. The enlarged waveguide may include nitride, and can be implemented with other conventional silicon and nitride waveguides.

Structures including a grating coupler and methods of fabricating a structure including a grating coupler. The structure includes structure includes a dielectric layer on a substrate, a first waveguide core positioned in a first level over the dielectric layer, and a second waveguide core positioned in a second level over the dielectric layer. The second level differs in elevation above the dielectric layer from the first level. The first waveguide core includes a tapered section. The structure further includes a grating coupler having a plurality of segments positioned in the second level adjacent to the second waveguide core. The segments of the grating coupler and the tapered section of the first waveguide core are positioned in an overlapping arrangement.