Described herein is an integrated photonics device including a light emitter, integrated edge outcoupler(s), optics, and a detector array. The device can include a hermetically sealed enclosure. The hermetic seal can reduce the amount of moisture and/or contamination that may affect the measurement, analysis, and/or the function of the individual components within the sealed enclosure. Additionally or alternatively, the hermetic seal can be used to protect the components within the enclosure from environmental contamination induced during the manufacturing, packaging, and/or shipping process. The outcoupler(s) can be formed by creating one or more pockets in the layers of a die. Outcoupler material can be formed in the pocket and, optionally, subsequent layers can be deposited on top. The edge of the die can be polished until a targeted polish plane is achieved. Once the outcoupler is formed, the die can be flipped over and other components can be formed.

A photonic integrated circuit (PIC) includes a semiconductor substrate, one or more passive components, and one or more active components. The one or more passive components are fabricated on the semiconductor substrate, wherein the passive components are fabricated in a III-V type semiconductor layer. The one or more active components are fabricated on top of the one or more passive components, wherein optical signals are communicated between the one or more active components via the one or more passive components.

A method for fabricating a light receiving device includes: preparing a first substrate product which includes a semiconductor region having a common semiconductor layer, a first semiconductor laminate for a photodiode, a second semiconductor laminate for a waveguide, and a butt-joint between the first semiconductor laminate and the second semiconductor laminate, the first laminate and the second semiconductor laminate being disposed on the common semiconductor layer; etching the first substrate product with a first mask to form a second substrate product having a photodiode mesa structure produced from the first semiconductor laminate and a preliminary mesa structure produced from the second semiconductor laminate; etching the second substrate product with the first mask and a second mask, formed on the photodiode mesa structure; to produce a waveguide mesa structure from the preliminary mesa structure, and the waveguide mesa structure having a height larger than that of the preliminary mesa structure.

A semiconductor integrated optical device includes a waveguide mesa having a first multilayer including a first core layer, a second multilayer including a second core layer, and a butt joint interface between the first core layer and the second core layer; a support having first to third regions; and a buried semiconductor region provided on the support. The first multilayer has a first mesa width on the first region. The second multilayer has a second mesa width on the second region. On the third region, the second multilayer has a waveguide portion having a third mesa width smaller than the first and the second mesa widths. The second core layer has a waveguide core thickness on the second region. In the waveguide portion, the second core layer has a core portion having a thickness different from the waveguide core thickness at a position away from the butt-joint interface.

There is set forth herein an optoelectrical system comprising: a conductive path for supplying an input voltage to a photonics device, wherein the conductive path comprises a base structure through via extending through a substrate and a photonics structure through via, the photonics structure through via extending through a photonics device dielectric stack. There is set forth herein an optoelectrical system comprising: a second structure fusion bonded to an interposer base dielectric stack of a first structure. There is set forth herein a method comprising: fabricating a second wafer built structure using a second wafer, the second wafer built structure defining a photonics structure and having a photonics device integrated into a photonics device dielectric stack of the second wafer based structure; and wafer scale bonding the second wafer built structure to a first wafer built structure.

A silicon-photonic integrated circuit comprising a direct-bandgap-semiconductor-based active optical device that is epitaxially grown on an indirect-bandgap SOI substrate (108) is disclosed. The structure of the active optical device includes an active region (120) having quantum dots (206) made of InGaAs that are embedded in one or more confinement layers (n-InP, p-InP), where the bandgap of the confinement layers is higher than that of the quantum dots. Further the confinement-layer material is preferably lattice matched to the quantum dot material in order to suppress associated crystalline defects within the material are located away from the center of its bandgap such that they suppress recombination-enhanced defect-reaction-driven degradation of the active optical device. The active optical device is epitaxially grown on a handle substrate of an SOI substrate that has a surface waveguide formed in its device layer, where the active region and the surface waveguide are at the same height above the handle wafer surface.

A mirror and method of fabricating the mirror, the method comprising: providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; creating a via in the silicon device layer, the via extending to the BOX layer; etching away a portion of the BOX layer starting at the via and extending laterally away from the via in a first direction to create a channel between the silicon device layer and silicon support layer; applying an anisotropic etch via the channel to regions of the silicon device layer and silicon support layer adjacent to the channel; the anisotropic etch following an orientation plane of the silicon device layer and silicon support layer to create a cavity underneath an overhanging portion of the silicon device layer; the overhanging portion defining a planar underside surface for vertically coupling light into and out of the silicon device layer; and applying a metal coating to the underside surface.

An optical fiber adapter and method of fabricating the same from a wafer including a double silicon-on-insulator layer structure. The optical fiber adapter may include a mode converter, a trench, and a V-groove, the V-groove and the trench operating as passive alignment features for an optical fiber, in the transverse translational and rotational degrees of freedom, and in the longitudinal translational degree of freedom, respectively. The mode converter may include a buried tapered waveguide.

An optical mode converter and method of fabricating the same from wafer including a double silicon-on-insulator layer structure. The method comprising: providing a first mask over a portion of a device layer of the DSOI layer structure; etching an unmasked portion of the device layer down to at least an upper buried oxide layer, to provide a cavity; etching a first isolation trench and a second isolation trench into a mode converter layer, the mode converter layer being: on an opposite side of the upper buried oxide layer to the device layer and between the upper buried oxide layer and a lower buried oxide layer, the lower buried oxide layer being above a substrate; wherein the first isolation trench and the second isolation trench define a tapered waveguide; filling the first isolation trench and the second isolation trench with an insulating material, so as to optically isolate the tapered waveguide from the remaining mode converter layer; and regrowing the etched region of the device layer.

There is set forth herein a method including building an interposer base structure on a first wafer having a first substrate, wherein the building an interposer base structure includes fabricating a plurality of through vias that extend through the first substrate and fabricating within an interposer base dielectric stack formed on the first substrate one or more metallization layer; building a photonics structure on a second wafer having a second substrate, wherein the building a photonics structure includes fabricating within a photonics device dielectric stack formed on the second substrate one or more photonics device; and bonding the photonics structure to the interposer base structure to define an interposer having the interposer base structure and one or more photonics device fabricated within the photonics device dielectric stack. There is set forth herein an optoelectrical system including a substrate; an interposer dielectric stack formed on the substrate, the interposer dielectric stack including a base interposer dielectric stack, and a photonics device dielectric stack, and a bond layer dielectric stack that integrally bonds the photonics device dielectric stack to the base interposer dielectric stack.