Patent classifications
G02B6/1225
Photonic integrated package and method forming same
A method includes placing an electronic die and a photonic die over a carrier, with a back surface of the electronic die and a front surface of the photonic die facing the carrier. The method further includes encapsulating the electronic die and the photonic die in an encapsulant, planarizing the encapsulant until an electrical connector of the electronic die and a conductive feature of the photonic die are revealed, and forming redistribution lines over the encapsulant. The redistribution lines electrically connect the electronic die to the photonic die. An optical coupler is attached to the photonic die. An optical fiber attached to the optical coupler is configured to optically couple to the photonic die.
Semiconductor devices having electro-optical substrates
Memory devices having electro-optical substrates are described herein. In one embodiment, a memory device includes a plurality of memories carried by an electro-optical substrate. The electro-optical substrate can include a circuit board and an optical routing layer on the circuit board. The memories can be (a) electrically coupled to the circuit board and (b) optically coupled to the optical routing layer. In some embodiments, the optical routing layer is a polymer waveguide.
Robust conjugated-symmetric optical apparatus and design method thereof
A robust conjugate symmetric optical apparatus is disclosed. The robust conjugate symmetric optical apparatus comprises a first optical cell set and a second optical cell set. The first optical cell set includes a first plurality of cells, each of which includes a first left half cell and a first right half cell, and the respective first right half cell and the corresponding first left half cells form a first symmetric structure therebetween. The second optical cell set includes a second plurality of cells, each of which includes a second left half cell and a second right half cell, and the respective second right half cell and the corresponding second left half cells form a second symmetric structure therebetween, wherein each of the first left half cells of the first optical cell set and each of the second right half cells of the second optical cell set have the same structure; and each of the first right half cells of the first optical cell set and each of the second left half cells of the second optical cell set have the same structure.
SINGLE PHOTON SOURCES
A single photon source comprises a photon emitter (10), an excitation waveguide (30) arranged to direct excitation photons having a first polarisation direction into the photon emitter, and a collection waveguide (42) arranged to collect photons having a second polarisation direction from the photon emitter. The first polarisation direction is coupled to a first exciton state of the photon emitter and the second polarisation direction is non-parallel to the first polarisation direction and is coupled to a second exciton state of the photon emitter, and the first and second exciton states have substantially equal energies.
TOPOLOGY PHOTONIC CRYSTAL CAVITY, AND ITS APPLICATION IN LASERs
A two-dimensional topological photonic crystal cavity, a design method thereof and an application in a laser. The two-dimensional topological photonic crystal cavity comprises multiple photonic crystal supercells, the multiple photonic crystal supercells having vortex-shaped structural variation around a center of the two-dimensional topological photonic crystal cavity, and bands of the multiple photonic crystal supercells having Dirac points at balance positions of the vortex-shaped structural variation. The two-dimensional topological photonic crystal cavity, also called the Dirac vortex cavity, is characterized by having large mode field area, large free spectral range, narrow beam divergence angle, arbitrary mode degeneracy and compatibility with plurality of types of substrate material, and may be used in a surface-emitting semiconductor laser, enabling stable single-transverse-mode and single-longitudinal-mode operation, while ensuring broad-area and high-power output of a laser.
CASCADED INTEGRATED PHOTONIC WAVELENGTH DEMULTIPLEXER
A photonic integrated circuit includes a photonic device. The photonic device includes an input region configured to receive an input signal including a plurality of multiplexed channels. The photonic device includes a metastructured dispersive region structured to partially demultiplex the input signal into an output signal and a throughput signal. The output signal includes a channel of the multiplexed channels. The throughput signal includes the remaining channels of the multiplexed channels. The photonic device includes an output region and a throughput region optically coupled with the metastructured dispersive region to receive the output signal and the throughput signal, respectively. The metastructured dispersive region includes a heterogeneous distribution of a first material and a second material that structures the metastructured dispersive region to partially demultiplex the input signal into the output signal and the throughput signal.
Multilevel semiconductor device and structure with oxide bonding
A multi-level semiconductor device, the device including: a first level including integrated circuits; a second level including a structure designed to conduct electromagnetic waves, where the second level is disposed above the first level, where the integrated circuits include single crystal transistors; and an oxide layer disposed between the first level and the second level, where the second level is bonded to the oxide layer, and where the bonded includes oxide to oxide bonds.
Photonic integrated circuit for a plurality of optical transmitters and receivers
A photonic integrated circuit (PIC) having a substrate in which vertically coupled photodetectors and in-line optical modulators are integrated to enable vertical coupling of light using a fiber assembly block (FAB), with the planar end surface thereof being attached to a substantially planar main surface of the substrate. In an example embodiment, the photodetectors are buried in deep vias formed in the substrate, and the in-line optical modulators are waveguide-connected to the corresponding vertical-coupling optical gratings. The photodetectors and optical gratings may be arranged in a linear array along the main surface of the substrate to enable uncomplicated optical alignment of end segments of the optical fibers in the FAB with the corresponding photodetectors and optical gratings for vertical coupling of light therebetween. In some embodiments, the FAB may have more than one hundred optical fibers. In some embodiments, the PIC can be implemented using the silicon photonics material platform.
Methods of forming photonic devices
A method includes: forming a first plurality of tiers that each comprises first and second dummy layers over a substrate, wherein within each tier, the second dummy layer is disposed above the first dummy layer; forming a second plurality of recessed regions in the first plurality of tiers, wherein at least one subgroup of the second plurality of recessed regions extend through respective different numbers of the second dummy layers; and performing an etching operation to concurrently forming a third plurality of trenches with respective different depths in the substrate through the at least one subgroup of the second plurality of recessed regions.
Multi-chip packaging of silicon photonics
A multi-chip package assembly includes a substrate, a first semiconductor chip attached to the substrate, and a second semiconductor chip attached to the substrate, such that a portion of the second semiconductor chip overhangs an edge of the substrate. A first v-groove array for receiving a plurality of optical fibers is present within the portion of the second semiconductor chip that overhangs the edge of the substrate. An optical fiber assembly including the plurality of optical fibers is positioned and secured within the first v-groove array of the second semiconductor chip. The optical fiber assembly includes a second v-groove array configured to align the plurality of optical fibers to the first v-groove array of the second semiconductor chip. An end of each of the plurality of optical fibers is exposed for optical coupling within an optical fiber connector located at a distal end of the optical fiber assembly.