A device and associated methods for using surface electromagnetic waves (SEWs) generated at the surface of photonic band gap multilayers (PBGMs) in place of surface plasmons (SPs) in metal films. One device is a photonic circuit comprising a multilayer apparatus to generate surface electromagnetic waves, wherein the surface electromagnetic waves comprise the signal medium within the circuit. The circuit may be formed or etched on the surface of the multilayer apparatus.

A device and associated methods for using surface electromagnetic waves (SEWs) generated at the surface of photonic band gap multilayers (PBGMs) in place of surface plasmons (SPs) in metal films. One device is a photonic circuit comprising a multilayer apparatus to generate surface electromagnetic waves, wherein the surface electromagnetic waves comprise the signal medium within the circuit. The circuit may be formed or etched on the surface of the multilayer apparatus.

Methods and systems for optical alignment to a silicon photonically-enabled integrated circuit may include aligning an optical assembly to a photonics die comprising a transceiver by, at least, communicating optical signals from the optical assembly into a plurality of grating couplers in the photonics die, communicating the one or more optical signals from the plurality of grating couplers to optical taps, with each tap having a first output coupled to the transceiver and a second output coupled to a corresponding output grating coupler, and monitoring an output optical signal communicated out of said photonic chip via said output grating couplers. The monitored output optical signal may be maximized by adjusting a position of the optical assembly. The optical assembly may include an optical source assembly comprising one or more lasers or the optical assembly may comprise a fiber array. Such a fiber array may include single mode optical fibers.

Methods and systems for optical alignment to a silicon photonically-enabled integrated circuit may include aligning an optical assembly to a photonics die comprising a transceiver by, at least, communicating optical signals from the optical assembly into a plurality of grating couplers in the photonics die, communicating the one or more optical signals from the plurality of grating couplers to optical taps, with each tap having a first output coupled to the transceiver and a second output coupled to a corresponding output grating coupler, and monitoring an output optical signal communicated out of said photonic chip via said output grating couplers. The monitored output optical signal may be maximized by adjusting a position of the optical assembly. The optical assembly may include an optical source assembly comprising one or more lasers or the optical assembly may comprise a fiber array. Such a fiber array may include single mode optical fibers.

The application relates to radars, and provides a chip with a beamforming network based on a photonic crystal resonant cavity tree structure and a fabrication method thereof. The chip includes a beamforming network layer, including an incidence coupling grating, first to Nth photonic crystal resonant cavity combinations, first to (N+1)th optical waveguides and an emergence coupling grating which are successively connected; branches of each photonic crystal resonant cavity combination is an integral multiple of that of the previous photonic crystal resonant cavity combination, and two photonic crystal resonant cavity combinations are connected by an optical waveguide.

A semiconductor structure is disclosed. The semiconductor structure includes: a substrate and a gate element over the substrate. The gate element includes: a gate dielectric layer over the substrate; a gate electrode over the gate dielectric layer; and a waveguide passing through the gate electrode from a top surface of the gate electrode to a bottom surface of the gate electrode. A manufacturing method of the same is also disclosed.

A semiconductor structure is disclosed. The semiconductor structure includes: a substrate and a gate element over the substrate. The gate element includes: a gate dielectric layer over the substrate; a gate electrode over the gate dielectric layer; and a waveguide passing through the gate electrode from a top surface of the gate electrode to a bottom surface of the gate electrode. A manufacturing method of the same is also disclosed.

A grating coupled laser (GCL) includes an active section and a passive section. The passive section is butt coupled to the active section to form a butt joint with the active section. The active section includes an active waveguide. The passive section includes a passive waveguide, a transmit grating coupler, and a top cladding. The passive waveguide is optically coupled end to end with the active waveguide and includes a first portion and a second portion. The first portion of the passive waveguide is positioned between the second portion of the passive waveguide and the active waveguide. The transmit grating coupler is optically coupled to the passive waveguide and includes grating teeth that extend upward from the second portion of the passive waveguide. The top cladding is positioned directly above the first portion of the passive waveguide and is absent directly above at least some of the transmit grating coupler.

The present disclosure relates to semiconductor structures and, more particularly, to grating couplers with multiple configurations and methods of manufacture. A grating coupler structure includes: a polysilicon material with a first grating coupling pattern; a SiN material with second grating coupling pattern; a dielectric material covering the polysilicon material and the SiN material; and a back end of line (BEOL) multilayer stack over the dielectric material.

The present disclosure relates to semiconductor structures and, more particularly, to grating couplers with multiple configurations and methods of manufacture. A grating coupler structure includes: a polysilicon material with a first grating coupling pattern; a SiN material with second grating coupling pattern; a dielectric material covering the polysilicon material and the SiN material; and a back end of line (BEOL) multilayer stack over the dielectric material.