Patent classifications
G02B6/124
PHOTONIC CHIP WITH AN INPUT WAVELENGTH FILTER
A photonic chip includes a device layer and a port layer, with an optical port located at the port layer. Inter-layer optical couplers are provided for coupling light between the device and port layers. The inter-layer couplers may be configured to couple signal light but block pump light or other undesired wavelength from entering the device layer, operating as an input filter. The port layer may accommodate other light pre-processing functions, such as optical power splitting, that are undesirable in the device layer.
SILICON NITRIDE GRATING COUPLERS
Grating couplers and methods of fabricating a grating coupler. The grating coupler may include a plurality of grating structures arranged on a substrate and a layer arranged over the grating structures. The grating structures are composed of a first material characterized by a first refractive index with a real part. The layer is composed of a second material characterized by a second refractive index with a real part. The real part of the second refractive index is greater than the real part of the first refractive index of the first material for electromagnetic radiation with a wavelength in a range of 1 micron to 9 microns.
SILICON NITRIDE GRATING COUPLERS
Grating couplers and methods of fabricating a grating coupler. The grating coupler may include a plurality of grating structures arranged on a substrate and a layer arranged over the grating structures. The grating structures are composed of a first material characterized by a first refractive index with a real part. The layer is composed of a second material characterized by a second refractive index with a real part. The real part of the second refractive index is greater than the real part of the first refractive index of the first material for electromagnetic radiation with a wavelength in a range of 1 micron to 9 microns.
Test systems and methods for chips in wafer scale photonic systems
A qualification apparatus for a photonic chip on a wafer that leaves undisturbed an edge coupler that provides an operating port for the photonic devices or circuits on the chip during normal operation in order to not introduce extra loss in the optical path of the final circuit. The qualification apparatus provides an optical path that is angled with regard to the surface of the chip, for example by using a grating coupler. The qualification apparatus can be removed after the chip is qualified. Optionally, the qualification apparatus can be left in communication with the chip and optionally employed as an input port for the chip after the chip has been separated from other chips on a common substrate.
Test systems and methods for chips in wafer scale photonic systems
A qualification apparatus for a photonic chip on a wafer that leaves undisturbed an edge coupler that provides an operating port for the photonic devices or circuits on the chip during normal operation in order to not introduce extra loss in the optical path of the final circuit. The qualification apparatus provides an optical path that is angled with regard to the surface of the chip, for example by using a grating coupler. The qualification apparatus can be removed after the chip is qualified. Optionally, the qualification apparatus can be left in communication with the chip and optionally employed as an input port for the chip after the chip has been separated from other chips on a common substrate.
Method and system for optical alignment to a silicon photonically-enabled integrated circuit
Methods and systems for optical alignment to a silicon photonically-enabled integrated circuit may include aligning an optical assembly to a photonics die comprising a transceiver by, at least, communicating optical signals from the optical assembly into a plurality of grating couplers in the photonics die, communicating the one or more optical signals from the plurality of grating couplers to optical taps, with each tap having a first output coupled to the transceiver and a second output coupled to a corresponding output grating coupler, and monitoring an output optical signal communicated out of said photonic chip via said output grating couplers. The monitored output optical signal may be maximized by adjusting a position of the optical assembly. The optical assembly may include an optical source assembly comprising one or more lasers or the optical assembly may comprise a fiber array. Such a fiber array may include single mode optical fibers.
Method and system for optical alignment to a silicon photonically-enabled integrated circuit
Methods and systems for optical alignment to a silicon photonically-enabled integrated circuit may include aligning an optical assembly to a photonics die comprising a transceiver by, at least, communicating optical signals from the optical assembly into a plurality of grating couplers in the photonics die, communicating the one or more optical signals from the plurality of grating couplers to optical taps, with each tap having a first output coupled to the transceiver and a second output coupled to a corresponding output grating coupler, and monitoring an output optical signal communicated out of said photonic chip via said output grating couplers. The monitored output optical signal may be maximized by adjusting a position of the optical assembly. The optical assembly may include an optical source assembly comprising one or more lasers or the optical assembly may comprise a fiber array. Such a fiber array may include single mode optical fibers.
System and method for three dimensional imaging
A system for three dimensional imaging includes: a light source; a modulator connected with the light source and configured to modulate output of the light source with a frequency sweep signal; an optical circuitry connected to the light source; a light sensor circuitry connected with the optical circuitry and configured to sense optical output of the optical circuitry and convert the optical output into a plurality of electrical signals; and a signal processing circuit connected with the light sensor circuitry and configured to extract 3D information of the object from the electrical signals. A mobile phone having the system and a method for three dimensional imaging are also provided.
System and method for three dimensional imaging
A system for three dimensional imaging includes: a light source; a modulator connected with the light source and configured to modulate output of the light source with a frequency sweep signal; an optical circuitry connected to the light source; a light sensor circuitry connected with the optical circuitry and configured to sense optical output of the optical circuitry and convert the optical output into a plurality of electrical signals; and a signal processing circuit connected with the light sensor circuitry and configured to extract 3D information of the object from the electrical signals. A mobile phone having the system and a method for three dimensional imaging are also provided.
SURFACE COUPLED SYSTEMS
A system includes a surface coupled edge emitting laser that includes a core waveguide, a fan out region optically coupled to the core waveguide in a same layer of the surface coupled edge emitting laser as the core waveguide; and a first surface grating formed in the fan out region; and a photonic integrated circuit (PIC) that includes an optical waveguide and a second surface grating formed in an upper layer of the PIC, wherein the second surface grating is in optical alignment with the first surface grating.