An optical module capable of suppressing deterioration of an adhesive layer and having a resistance to high-power light even when high-energy light propagates is configured by connecting an optical fiber to a PLC. The optical fiber is provided with an etching face at a recessed area where a cladding region on its side face is partially removed over a length L in a light propagation direction from an input/output end connected to the PLC, and the PLC is also provided with an etching face at a recessed area where a cladding layer is partially removed over the length L in the light propagation direction from an input/output end connected to the optical fiber. The adhesive layer made of a UV cured resin is interposed between the etching faces to bond and fix the etching faces to each other, and a core of the optical fiber and a core layer of the PLC form a directional coupler for linearly dispersing energy density.

An optical module capable of suppressing deterioration of an adhesive layer and having a resistance to high-power light even when high-energy light propagates is configured by connecting an optical fiber to a PLC. The optical fiber is provided with an etching face at a recessed area where a cladding region on its side face is partially removed over a length L in a light propagation direction from an input/output end connected to the PLC, and the PLC is also provided with an etching face at a recessed area where a cladding layer is partially removed over the length L in the light propagation direction from an input/output end connected to the optical fiber. The adhesive layer made of a UV cured resin is interposed between the etching faces to bond and fix the etching faces to each other, and a core of the optical fiber and a core layer of the PLC form a directional coupler for linearly dispersing energy density.

An optical device is disclosed, including a phase delay, a first adiabatic coupler adapted to receive an input signal and adapted to be optically coupled to an input of the phase delay, and a second adiabatic coupler adapted to be optically coupled to an output of the phase delay. The second adiabatic coupler includes a first waveguide including a first portion optically coupled to the first output and including a first width, and a second waveguide including a second portion optically coupled to the second output and including a second width that is approximately equal to the first width.

An optoelectronic device. The device comprising: a silicon-on-insulator, SOI, wafer, the SOI wafer including a cavity and an input waveguide, the input waveguide being optically coupled into the cavity; and a mirror, located within the cavity and bonded to a bed thereof, the mirror including a reflector configured to reflect light received from the input waveguide in the SOI wafer.

An optoelectronic device. The device comprising: a silicon-on-insulator, SOI, wafer, the SOI wafer including a cavity and an input waveguide, the input waveguide being optically coupled into the cavity; and a mirror, located within the cavity and bonded to a bed thereof, the mirror including a reflector configured to reflect light received from the input waveguide in the SOI wafer.

A photonic integrated circuit (PIC) includes one or more couplers to interface a light source with the PIC, a splitter directly coupled to the one or more couplers at a coupling point of the PIC, a modulator to receive light from the couplers, and a connecting waveguide to connect the splitter to the modulator. The waveguide may be a rib waveguide. The PIC may be integrated with devices such as a CWDM or a PSM device, and may provide improved performance and lower attention for high optical power applications.

A integrated light source module includes a planar optical waveguides layer having N light incident ports aligned with respect to each other, M light exit ports aligned with respect to each other, and optical waveguides connected to the N light incident ports and the M light exit ports, and N optical semiconductor devices facing each of the N light incident ports arranged so that light emitted from each of the N optical semiconductor devices can be incident on each of the N light incident ports, wherein light emitted from the M light exit ports can be applied to an object to be irradiated.

A mirror and method of fabricating the mirror, the method comprising: providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; creating a via in the silicon device layer, the via extending to the BOX layer; etching away a portion of the BOX layer starting at the via and extending laterally away from the via in a first direction to create a channel between the silicon device layer and silicon support layer; applying an anisotropic etch via the channel to regions of the silicon device layer and silicon support layer adjacent to the channel; the anisotropic etch following an orientation plane of the silicon device layer and silicon support layer to create a cavity underneath an overhanging portion of the silicon device layer; the overhanging portion defining a planar underside surface for vertically coupling light into and out of the silicon device layer; and applying a metal coating to the underside surface.

A mirror and method of fabricating the mirror, the method comprising: providing a silicon-on-insulator substrate, the substrate comprising: a silicon support layer; a buried oxide (BOX) layer on top of the silicon support layer; and a silicon device layer on top of the BOX layer; creating a via in the silicon device layer, the via extending to the BOX layer; etching away a portion of the BOX layer starting at the via and extending laterally away from the via in a first direction to create a channel between the silicon device layer and silicon support layer; applying an anisotropic etch via the channel to regions of the silicon device layer and silicon support layer adjacent to the channel; the anisotropic etch following an orientation plane of the silicon device layer and silicon support layer to create a cavity underneath an overhanging portion of the silicon device layer; the overhanging portion defining a planar underside surface for vertically coupling light into and out of the silicon device layer; and applying a metal coating to the underside surface.

An optical beam combiner circuit includes a plurality of branch portions configured to divide optical beams output from a plurality of input waveguides, a combiner unit configured to combine optical beams, each of the optical beams being one of the divided optical beams obtained by one of the plurality of branch portions, an output waveguide configured to output an optical beam obtained by the combiner unit combining the optical beams, a plurality of monitoring waveguides configured to output optical beams, each of the optical beams being another of the divided optical beams obtained by one of the plurality of branch portions, and a plurality of light-blocking grooves provided on both sides with respect to each input waveguide, the plurality of light-blocking grooves being positioned to enable stray light not coupled to the plurality of input waveguides to be reflected toward an end surface different from an exit end surface of each monitoring waveguide and also different from an exit end surface of the output waveguide.