A method for determining the existence of a defect in a printed pattern may include obtaining a) a captured image of a printed pattern from an image capture device, and b) a simulated image of the printed pattern generated by a process model. The method may include generating a combined image as a weighted combination of portions of the captured image and the simulated image. The method may include determining whether a defect exists in the printed pattern based on the combined image.

Mask inspection apparatuses and/or mask inspection methods are provided that enable quick and accurate inspection of a registration of a pattern on a mask while a defect of the mask and the registration of the pattern are inspected simultaneously. The mask inspection apparatus may include a stage configured to receive a mask for inspection; an e-beam array including a plurality of e-beam irradiators configured to irradiate e-beams to the mask and detectors configured to detect electrons emitted from the mask; and a processor configured to process signals from the detectors. A defect of the mask may be detected through processing of the signal and registrations of patterns on the mask may be inspected based on positional information regarding the e-beam irradiators.

The invention relates to a device for examining and/or processing an element for photolithography with a beam of charged particles, wherein the device comprises: (a) means for acquiring measurement data while the element for photolithography is exposed to the beam of charged particles; and (b) means for predetermining a drift of the beam of charged particles relative to the element for photolithography with a trained machine learning model and/or a predictive filter, wherein the trained machine learning model and/or the predictive filter use(s) at least the measurement data as input data.

Computer-implemented methods of optimizing a process simulation model that predicts a result of a semiconductor device fabrication operation to process parameter values characterizing the semiconductor device fabrication operation are disclosed. The methods involve generating cost values using a computationally predicted result of the semiconductor device fabrication operation and a metrology result produced, at least in part, by performing the semiconductor device fabrication operation in a reaction chamber operating under a set of fixed process parameter values. The determination of the parameters of the process simulation model may employ pre-process profiles, via optimization of the resultant post-process profiles of the parameters against profile metrology results. Cost values for, e.g., optical scatterometry, scanning electron microscopy and transmission electron microscopy may be used to guide optimization.

Computer-implemented methods of optimizing a process simulation model that predicts a result of a semiconductor device fabrication operation to process parameter values characterizing the semiconductor device fabrication operation are disclosed. The methods involve generating cost values using a computationally predicted result of the semiconductor device fabrication operation and a metrology result produced, at least in part, by performing the semiconductor device fabrication operation in a reaction chamber operating under a set of fixed process parameter values. The determination of the parameters of the process simulation model may employ pre-process profiles, via optimization of the resultant post-process profiles of the parameters against profile metrology results. Cost values for, e.g., optical scatterometry, scanning electron microscopy and transmission electron microscopy may be used to guide optimization.

Mask inspection apparatuses and/or mask inspection methods are provided that enable quick and accurate inspection of a registration of a pattern on a mask while a defect of the mask and the registration of the pattern are inspected simultaneously. The mask inspection apparatus may include a stage configured to receive a mask for inspection; an e-beam array including a plurality of e-beam irradiators configured to irradiate e-beams to the mask and detectors configured to detect electrons emitted from the mask; and a processor configured to process signals from the detectors. A defect of the mask may be detected through processing of the signal and registrations of patterns on the mask may be inspected based on positional information regarding the e-beam irradiators.

Computer-implemented methods of optimizing a process simulation model that predicts a result of a semiconductor device fabrication operation to process parameter values characterizing the semiconductor device fabrication operation are disclosed. The methods involve generating cost values using a computationally predicted result of the semiconductor device fabrication operation and a metrology result produced, at least in part, by performing the semiconductor device fabrication operation in a reaction chamber operating under a set of fixed process parameter values. The determination of the parameters of the process simulation model may employ pre-process profiles, via optimization of the resultant post-process profiles of the parameters against profile metrology results. Cost values for, e.g., optical scatterometry, scanning electron microscopy and transmission electron microscopy may be used to guide optimization.

Computer-implemented methods of optimizing a process simulation model that predicts a result of a semiconductor device fabrication operation to process parameter values characterizing the semiconductor device fabrication operation are disclosed. The methods involve generating cost values using a computationally predicted result of the semiconductor device fabrication operation and a metrology result produced, at least in part, by performing the semiconductor device fabrication operation in a reaction chamber operating under a set of fixed process parameter values. The determination of the parameters of the process simulation model may employ pre-process profiles, via optimization of the resultant post-process profiles of the parameters against profile metrology results. Cost values for, e.g., optical scatterometry, scanning electron microscopy and transmission electron microscopy may be used to guide optimization.

A device area includes at least a first layer of photoresist and a second layer of photoresist. First layer metrology targets are positioned at an edge of one of the sides of the first layer of the mat. The first layer metrology targets have a relaxed pitch less than a device pitch. Secondary electron and back-scattered electron images can be simultaneously obtained.

A device area includes at least a first layer of photoresist and a second layer of photoresist. First layer metrology targets are positioned at an edge of one of the sides of the first layer of the mat. The first layer metrology targets have a relaxed pitch less than a device pitch. Secondary electron and back-scattered electron images can be simultaneously obtained.