A method for mask data synthesis and mask making includes calibrating an optical proximity correction (OPC) model by adjusting a plurality of parameters including a first parameter and a second parameter, wherein the first parameter indicates a long-range effect caused by an electron-beam lithography tool for making a mask used to manufacture a structure, and the second parameter indicates a geometric feature of a structure or a manufacturing process to make the structure, generating a device layout, calculating a first grid pattern density map of the device layout, generating a long-range correction map, at least based on the calibrated OPC model and the first grid pattern density map of the device layout, and performing an OPC to generate a corrected mask layout, at least based on the generated long-range correction map and the calibrated OPC model.

An electron beam lithography (Ebeam) method for a wafer having alignment and device layers with a design alignment. The Ebeam method includes executing an Ebeam scan of predefined length and resolution based on the design alignment over a pattern edge of the device layer, generating a signal from reflections of the Ebeam scan off the pattern edge, determining an offset of the device layer relative to the alignment layer from a comparison of the signal and the design alignment and applying the offset to the design alignment to obtain an actual measurement of Ebeam alignment.

A method for exposing a pattern in an area on a surface using a charged particle beam system is disclosed and includes determining a local pattern density for the area of the pattern based on an original set of exposure information. A pre-PEC maximum dose is determined for the area. The original set of exposure information is modified with the pre-PLC maximum dose.

An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.

A method for exposing a pattern in an area on a surface using a charged particle beam system is disclosed and includes determining a local pattern density for the area of the pattern based on an original set of exposure information. A pre-PEC maximum dose is determined for the area. The original set of exposure information is modified with the pre-PLC maximum dose.

A method for exposing a pattern in an area on a surface using a charged particle beam system is disclosed and includes inputting an original set of exposure information for the area and inputting a target post-proximity effect correction (PEC) maximum dose. A local pattern density is calculated for the area of the pattern based on the original set of exposure information. A pre-PEC maximum dose is determined for the area. The original set of exposure information is modified with the pre-PEC maximum dose.

Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer. The method comprises generating beamlet control data for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices, wherein the beamlet control data is generated based on a feature data set defining features selectable for individualizing the electronic devices, wherein exposure of the wafer according to the beamlet control data results in exposing a pattern having a different selection of the features from the feature data set for different subsets of the electronic devices.

A method of making a grating, the method including: providing a substrate, placing a first photoresist layer on the substrate, locating a second photoresist layer on the first photoresist layer, wherein a second exposure dose of the second photoresist layer is greater than a first exposure dose of the first photoresist layer; exposing the first photoresist layer and the second photoresist layer; developing the first photoresist layer and the second photoresist layer and removing an exposed photoresist to form a patterned photoresist layer and obtain an exposed surface of the substrate, wherein the patterned photoresist layer defines a plurality of top surfaces and a plurality of side surfaces, each adjacent top surface and side surface, and the exposed surface form a Z-type surface; depositing a preformed layer on the Z-type surface to form a Z-type structure; removing the patterned photoresist layer.

An electron beam lithography system and an electron beam lithography process are disclosed herein for improving throughput. An exemplary method for increasing throughput achieved by an electron beam lithography system includes receiving an integrated circuit (IC) design layout that includes a target pattern, wherein the electron beam lithography system implements a first exposure dose to form the target pattern on a workpiece based on the IC design layout. The method further includes inserting a dummy pattern into the IC design layout to increase a pattern density of the IC design layout to greater than or equal to a threshold pattern density, thereby generating a modified IC design layout. The electron beam lithography system implements a second exposure dose that is less than the first exposure dose to form the target pattern on the workpiece based on the modified IC design layout.

Method of manufacturing electronic devices using a maskless lithographic exposure system using a maskless pattern writer. The method comprises generating beamlet control data for controlling the maskless pattern writer to expose a wafer for creation of the electronic devices, wherein the beamlet control data is generated based on a feature data set defining features selectable for individualizing the electronic devices, wherein exposure of the wafer according to the beamlet control data results in exposing a pattern having a different selection of the features from the feature data set for different subsets of the electronic devices.