A method for use in optical measurements on patterned structures, the method including performing a number of optical measurements on a structure with a measurement spot configured to provide detection of light reflected from an illuminating spot at least partially covering at least two different regions of the structure, the measurements including detecting light reflected from the at least part of the at least two different regions within the measurement spot, the detected light including interference of at least two complex electric fields reflected from the at least part of the at least two different regions, and being therefore indicative of a phase response of the structure, carrying information about properties of the structure.

Methods for training a process model and determining ranking of simulated patterns (e.g., corresponding to hot spots). A method involves obtaining a training data set including: (i) a simulated pattern associated with a mask pattern to be printed on a substrate, (ii) inspection data of a printed pattern imaged on the substrate using the mask pattern, and (iii) measured values of a parameter of the patterning process applied during imaging of the mask pattern on the substrate; and training a machine learning model for the patterning process based on the training data set to predict a difference in a characteristic of the simulated pattern and the printed pattern. The trained machine learning model can be used for determining a ranking of hot spots. In another method a model is trained based on measurement data to predict ranking of the hot spots.

A method for process control in the manufacture of semiconductor devices including performing metrology on at least one Design of Experiment (DOE) semiconductor wafer included in a lot of semiconductor wafers, the lot forming part of a batch of semiconductor wafer lots, generating, based on the metrology, one or more correctables to a process used to manufacture the lot of semiconductor wafers and adjusting, based on the correctables, the process performed on at least one of; other semiconductor wafers included in the lot of semi-conductor wafers, and other lots of semiconductor wafers included in the batch.

A system and methods for Advance Process Control (APC) in semiconductor manufacturing include: for each of a plurality of waiter sites, receiving a pre-process set of scatterometric training data, measured before implementation of a processing step, receiving a corresponding post-process set of scatterometric training data measured after implementation of the process step, and receiving a set of process control knob training data indicative of process control knob settings applied during implementation of the process step; and generating a machine learning model correlating variations in the pre-process sets of scatterometric training data and the corresponding process control knob training data with the corresponding post-process sets of scatterometric training data, to train the machine learning model to recommend changes to process control knob settings to compensate for variations in the pre-process scatterometric data.

The present invention provides a control apparatus for performing synchronous control to synchronize driving of a second moving member so as to follow driving of a first moving member, including a feedforward control system that includes a calculator configured to obtain an input/output response of the second moving member and position deviations of the first moving member and the second moving member while driving the first moving member and the second moving member in synchronism with each other, and calculate a feedforward manipulated variable based on the input/output response of the second moving member and the synchronous error between the first moving member and the second moving member obtained from the position deviations of the first moving member and the second moving member.

A method for calibrating a process model of a patterning process. The method includes identifying a portion of the substrate that has values within a tolerance band of one or more parameters (e.g., CD, EPE, etc.) of the patterning process, obtaining, via a metrology tool, metrology data corresponding to the portion of the substrate, processing the metrology data, and calibrating a process model based on the processed metrology data.

During electron beam imaging of a semiconductor wafer, the electron beam is adjusted to a first electron dose/nm.sup.2/time value below a damage threshold for an image frame grab of a site on the semiconductor wafer. Then the electron beam is adjusted to a second electron dose/nm.sup.2/time value different from the first electron dose/nm.sup.2/time value for a second image frame grab of the site. The second electron dose/nm.sup.2/time value can be above the damage threshold.

An inspection apparatus, including: an optical system configured to provide a beam of radiation to a surface to be measured and to receive redirected radiation from the surface; and a detection system configured to measure the redirected radiation, wherein the optical system includes an optical element to process the radiation, the optical element including a Mac Neille-type multilayer polarizing coating configured to produce a reduced chromatic offset of the radiation.

A method for controlling a lithographic apparatus configured to pattern an exposure field on a substrate including at least a sub-field, the method including: obtaining an initial spatial profile associated with a spatial variation of a performance parameter associated with a layer on the substrate across at least the sub-field of the exposure field; and decomposing the initial spatial profile into at least a first component spatial profile for controlling a lithographic apparatus at a first spatial scale and a second component spatial profile for controlling the lithographic apparatus at a second spatial scale associated with a size of the sub-field, wherein the decomposing includes co-optimizing the first and second component spatial profiles based on correcting the spatial variation of the performance parameter across the sub-field.

Disclosed is a method of determining a process window within a process space comprising obtaining contour data relating to features to be provided to a substrate across a plurality of layers, for each of a plurality of process conditions associated with providing the features across said plurality of layers and failure mode data describing constraints on the contour data across the plurality of layers. The failure mode data is applied to the contour data to determine a failure count for each process condition; and the process window is determined by associating each process condition to its corresponding failure count. Also disclosed is a method of determining an actuation constrained subspace of the process window based on actuation constraints imposed by the plurality of actuators.