Patent classifications
G03F7/70616
HOLLOW-CORE PHOTONIC CRYSTAL FIBER BASED BROADBAND RADIATION GENERATOR
A broadband radiation source device, including a fiber assembly having a plurality of optical fibers, each optical fiber being filled with a gas medium, wherein the broadband radiation source device is operable such that subsets of the optical fibers are independently selectable for receiving a beam of input radiation so as to generate a broadband output from only a subset of the plurality of optical fibers at any one time.
METHOD FOR MEASURING A SAMPLE AND MICROSCOPE IMPLEMENTING THE METHOD
The present invention relates to a method for measuring a sample with a microscope, the method comprising scanning the sample using a focusing plane having a first angle with respect to a top surface of the sample and computing a confidence distance based on the first angle. The method further comprises selecting at least one among a plurality of alignment markers on the sample for performing a lateral alignment of the scanning step and/or for performing a lateral alignment of an output of the scanning step. In particular, the at least one alignment marker selected at the selecting step is chosen among the alignment markers placed within the confidence distance from an intersection of the focusing plane with the top surface.
FEED-FORWARD AND UTILIZATION OF HEIGHT INFORMATION FOR METROLOGY TOOLS
Methods and systems for configuring a metrology tool are described. A processor can receive a height map of a sample from an apparatus configured to generate wafer height maps. The received height map can indicate height information of a plurality of features on a surface of the sample. The plurality of features can be located on a plurality of focal planes. The processor can generate settings for the metrology tool based on the height map of the sample.
METHODS FOR MANUFACTURING SEMICONDUCTOR DEVICES USING MOIRÉ PATTERNS
A method for manufacturing a semiconductor device may include: forming a first layer comprising a plurality of patterns, each pattern having a different respective pitch; performing exposure and development to form a second layer at a layer different from the first layer; determining whether a pitch shift of a part of exposure patterns formed is within a tolerance range, using a Moire pattern; and performing etching for the second layer when the pitch shift of the part of exposure patterns is determined to be within the tolerance range. Performing the exposure and the development may include forming a first exposure pattern corresponding to a key pattern having a first pitch, forming a second exposure pattern corresponding to a cell pattern having a second pitch, and forming a third exposure pattern corresponding to a middle pitch pattern having a third pitch between the first pitch and the second pitch.
Metrology method, computer product and system
A method including determining a type of structural asymmetry of the target from measured values of the target, and performing a simulation of optical measurement of the target to determine a value of an asymmetry parameter associated with the asymmetry type. A method including performing a simulation of optical measurement of a target to determine a value of an asymmetry parameter associated with a type of structural asymmetry of the target determined from measured values of the target, and analyzing a sensitivity of the asymmetry parameter to change in a target formation parameter associated with the target. A method including determining a structural asymmetry parameter of a target using a measured parameter of radiation diffracted by the target, and determining a property of a measurement beam of the target based on the structural asymmetry parameter that is least sensitive to change in a target formation parameter associated with the target.
APPARATUS AND METHOD FOR PROCESS-WINDOW CHARACTERIZATION
A process of characterizing a process window of a patterning process, the process including: obtaining a set of inspection locations for a pattern, the pattern defining features to be applied to a substrate with a patterning process, the set of inspection locations corresponding to a set of the features, the set of features being selected from among the features according to sensitivity of the respective features to variation in one or more process characteristics of the patterning process; patterning one or more substrates under varying process characteristics of the patterning process; and determining, for each of the variations in the process characteristics, whether at least some of the set of features yielded unacceptable patterned structures on the one or more substrates at corresponding inspection locations.
PROCESSING REFERENCE DATA FOR WAFER INSPECTION
An improved apparatus and method for facilitating inspection of a wafer are disclosed. An improved method for facilitating inspection of a wafer comprises identifying a plurality of repeating patterns from reference image data associated with a layout design of the wafer. The method also comprises determining a pattern feature of one of the identified plurality of repeating patterns based on a change of a first characteristic of the reference image data. The method further comprises causing a first area of the wafer corresponding to the determined pattern feature to be evaluated.
SUBSTRATE, PATTERNING DEVICE AND METROLOGY APPARATUSES
Disclosed is a method for determining a focus parameter value used to expose at least one structure on a substrate. The method comprises obtaining measurement data relating to a measurement of said at least one structure, wherein the at least one structure comprises a single periodic structure per measurement location and decomposing said measurement data into component data comprising one or more components of said measurement data. At least one of said components is processed to extract processed component data having a reduced dependence on non-focus related effects and a value for the focus parameter is determined from said processed component data. Associated apparatuses and patterning devices are also disclosed.
BIAS CORRECTION FOR LITHOGRAPHY
Methods include inputting an array of pixels, where each pixel in the array of pixels has a pixel dose. The array of pixels represents dosage on a surface to be exposed with a plurality of patterns, each pattern of the plurality of patterns having an edge. A target bias is input. An edge of a pattern in the plurality of patterns is identified. For each pixel which is in a neighborhood of the identified edge, a calculated pixel dose is calculated such that the identified edge is relocated by the target bias. The array of pixels with the calculated pixel doses is output. Systems for performing the methods are also disclosed.
Method and Structure for Determining an Overlay Error
A semiconductor structure includes a device area that includes a first structure in a first layer having a top surface above a top surface of the first layer, and a second structure in a second layer on top of the first layer, where the first structure is pinned in the second structure; an overlay metrology area for optically evaluating an overlay error between the second and first structure, including: a third structure in the first layer, having a top surface above the top surface of the first layer, a fourth structure in the second layer, where the combination of the third and fourth structures mimics the combination of the first structure and the second structures, and a fifth structure in the first layer, for use as a reference structure.