The present invention provides a substrate processing apparatus that processes a substrate, the apparatus including a stage configured to hold and move the substrate, a conveying unit configured to hold and convey the substrate between conveying unit and the stage, an accumulation unit configured to accumulate control information concerning the stage and the conveying unit which is generated by processing the substrate, and a determination unit configured to determine a conveying procedure when conveying the substrate between the stage and the conveying unit by selecting one of a plurality of conveying procedures which can be set for the stage and the conveying unit based on control information accumulated in the accumulation unit.

A substrate holder for a lithographic apparatus has a main body having a thin-film stack provided on a surface thereof. The thin-film stack forms an electronic or electric component such as an electrode, a sensor, a heater, a transistor or a logic device, and has a top isolation layer. A plurality of burls to support a substrate are formed on the thin-film stack or in apertures of the thin-film stack.

Disclosed is an object table for holding an object, comprising: an electrostatic clamp arranged to clamp the object on the object table; a neutralizer arranged to neutralize a residual charge of the electrostatic clamp; a control unit arranged to control the neutralizer, wherein the residual charge is an electrostatic charge present on the electrostatic clamp when no voltage is applied to the electrostatic clamp.

A substrate holder for use in a lithographic apparatus and configured to support a substrate, the substrate holder including a main body having a main body surface, a plurality of main burls projecting from the main body surface, wherein each main burl has a distal end surface configured to support the substrate, a first seal member projecting from the main body surface and having an upper surface, the first seal member surrounding the plurality of main burls and configured to restrict the passage of liquid between the substrate and the main body surface radially inward past the first seal member; and a plurality of minor burls projecting from the upper surface of the first seal member, wherein each minor burl has a distal end surface configured to support the substrate.

Systems, apparatuses, methods, and computer program products are provided for determining a free form flatness of a substrate table. An example system can include a substrate table that includes a first substrate table surface and a grounded substrate table electrical connection configured to ground the substrate table. The system can further include a substrate that includes a semiconducting layer, a thermally-grown insulating layer, a first substrate surface disposed on the insulating layer, and a substrate electrical connection configured to transmit a voltage to the semiconducting layer. The system can further include a metrology system configured to apply a voltage to the substrate electrical connection to electrostatically clamp the substrate to the substrate table, measure a flatness of the first substrate surface, and determine a free form flatness of the first substrate table surface based on the measured flatness of the first substrate surface.

A substrate holder for use in a lithographic apparatus, the substrate holder including: a main body; a plurality of first burls provided on a first side of the main body and having end surfaces to support a substrate, wherein the first burls each include CrN; and a plurality of second burls provided on a second side of the main body.

A reticle carrier described herein is configured to quickly discharge the residual charge on a reticle so as to reduce, minimize, and/or prevent particles in the reticle carrier from being attracted to and/or transferred to the reticle. In particular, the reticle carrier may be configured to provide reduced capacitance between an inner baseplate of the reticle carrier and the reticle. The reduction in capacitance may reduce the resistance-capacitance (RC) time constant for discharging the residual charge on the reticle, which may increase the discharge speed for discharging the residual charge through support pins of the reticle carrier. The increase in discharge speed may reduce the likelihood that an electrostatic force in the reticle carrier may attract particles in the reticle carrier to the reticle. This may reduce pattern defects transferred to substrates that are patterned using the reticle, may increase semiconductor device manufacturing quality and yield, and may reduce scrap and rework of semiconductor devices and/or wafers.

A method for lithography in semiconductor fabrication is provided. The method includes placing a semiconductor wafer over a wafer stage. The method also includes supplying an initial voltage to a plurality of electrodes of the wafer stage based on a topology of the semiconductor wafer, wherein the electrodes of the wafer stage are electrically isolated from each other. The method further includes measuring an adjusted topology of the semiconductor wafer after the initial voltage is supplied. In addition, the method includes supplying different first adjusted voltages to the electrodes of the wafer stage according to the adjusted topology of the semiconductor wafer.

A method includes holding a mask using an electrostatic chuck. The mask includes a substrate having a first bump and a second bump separated from the first bump and a patterned layer. The first bump and the second bump face the electrostatic chuck. The substrate is between the patterned layer and the electrostatic chuck. The first bump and the second bump are spaced apart from the patterned layer. The first bump and the second bump are ring strips in a top view, and the first bump has a rectangular cross section and the second bump has a triangular cross section. The method further includes generating extreme ultraviolet (EUV) radiation using an EUV light source; and directing the EUV radiation toward the mask, such that the EUV radiation is reflected by the mask.

Systems and methods for forming structures (e.g., a plurality of support peaks) on a surface are described. Forming structures on a surface includes masking one or more portions of the surface; removing material from one or more unmasked portions of the surface; and iteratively repeating the masking and removing to reshape the unmasked portions of the surface until the plurality of structures (e.g., support peaks) are formed such that regions of the surface between individual structures (support peaks) have a target characteristic such as a target topography, roughness, etc.