A method for monitoring flatness of a wafer table includes: acquiring a yield and original focus data of a wafer in real time; obtaining an edge flatness curve of a wafer table based on the original focus data; obtaining a yield curve of the wafer based on the yield of the wafer; obtaining a trend diagram of the edge flatness and the yield over time based on the edge flatness curve and the yield curve; and determining, based on the trend diagram, an edge flatness value of the wafer table when the wafer table is replaced.

A method includes: providing a workpiece to a semiconductor apparatus, the workpiece including a material layer, wherein the material layer includes a first strip having a first plurality of exposure fields configured to be exposed in a first direction and a second plurality of exposure fields configured to be exposed in a second direction different from the first direction; scanning the first strip along a first scan route in the first direction to generate first topography measurement data; scanning the first strip along a second scan route in the second direction to generate second topography measurement data; and exposing the first plurality of exposure fields according to the first topography measurement data and exposing the second plurality of exposure fields according to the second topography measurement data.

A laser processing method of performing laser processing on a transparent material that is transparent to ultraviolet light by using a laser processing system includes: performing relative positioning of a transfer position of a transfer image and the transparent material in an optical axis direction of a pulse laser beam so that the transfer position is set at a position inside the transparent material at a predetermined depth ΔZsf from a surface of the transparent material in the optical axis direction; and irradiating the transparent material with the pulse laser beam having a pulse width of 1 ns to 100 ns inclusive and a beam diameter of 10 μm to 150 μm inclusive at the transfer position.

Provided is an intelligent correction device control system for a super-resolution lithography precision mask, including: a sixteen-way pneumatic fine-tuning mask deformation control subsystem configured to deform a mask, detect a force value of a mask deformation, compare the force value of the mask deformation with an output force set value, and generate a first control feedback quantity to adjust a force deforming the mask, so as to control a deformation quantity of the mask; and an alignment subsystem configured to acquire images of the mask and a substrate, and adjust a position between the mask and the substrate according to the images, so as to align the mask with the substrate.

A lithographic apparatus and associated method of controlling a lithographic process. The lithographic apparatus has a controller configured to define a control grid associated with positioning of a substrate within the lithographic apparatus. The control grid is based on a device layout, associated with a patterning device, defining a device pattern which is to be, and/or has been, applied to the substrate in a lithographic process.

An apparatus for measuring a height of a substrate for processing in a lithographic apparatus is disclosed. The apparatus comprises a first sensor for sensing a height of the substrate over a first area. The apparatus also comprises a second sensor for sensing a height of the substrate over a second area. The apparatus further comprises a processor adapted to normalize first data corresponding to a signal from the first sensor with a second sensor footprint to produce a first normalized height data, and to normalize second data corresponding to a signal from the second sensor with a first sensor footprint to produce a second normalized height data. The processor is adapted to determine a correction to a measured height of the substrate based on a difference between the first and second normalized height data.

A lithographic apparatus (LA) applies a pattern to a substrate (W). The lithographic apparatus includes a height sensor (LS), a substrate positioning subsystem, and a controller configured for causing the height sensor to measure the height (h) of the substrate surface at locations across the substrate. The measured heights are used to control the focusing of one or more patterns applied to the substrate. The height h is measured relative to a reference height (zref). The height sensor is operable to vary the reference height (zref), which allows a wider effective range of operation. Specifications for control of the substrate height during measurement can be relaxed. The reference height can be varied by moving one or more optical elements (566, 572, 576, 504 and/or 512) within the height sensor, or moving the height sensor. An embodiment without moving parts includes a multi-element photodetector (1212).

A method of performing a lithography process includes providing a test pattern. The test pattern includes a first set of lines arranged at a first pitch, a second set of lines arranged at the first pitch, and further includes at least one reference line between the first set of lines and the second set of lines. The test pattern is exposed with a radiation source providing an asymmetric, monopole illumination profile to form a test pattern structure on a substrate. The test pattern structure is then measured and a measured distance correlated to an offset of a lithography parameter. A lithography process is adjusted based on the offset of the lithography parameter.

In a method executed in an exposure apparatus, a focus control effective region and a focus control exclusion region are set based on an exposure map and a chip area layout within an exposure area. Focus-leveling data are measured over a wafer. A photo resist layer on the wafer is exposed with an exposure light. When a chip area of a plurality of chip areas of the exposure area is located within an effective region of a wafer, the chip area is included in the focus control effective region, and when a part of or all of a chip area of the plurality of chip areas is located on or outside a periphery of the effective region of the wafer, the chip area is included in the focus control exclusion region In the exposing, a focus-leveling is controlled by using the focus-leveling data measured at the focus control effective region.

An assembly for collimating broadband radiation, the assembly including: a convex refractive singlet lens having a first spherical surface for coupling the broadband radiation into the lens and a second spherical surface for coupling the broadband radiation out of the lens, wherein the first and second spherical surfaces have a common center; and a mount for holding the convex refractive singlet lens at a plurality of contact points having a centroid coinciding with the common center.