An over temperature compensation control circuit is coupled to a conversion unit. The over temperature compensation control circuit includes a detection circuit, a temperature control resistor, and a comparison unit. The detection circuit provides a current signal responsive to an input voltage according to a voltage signal responsive to the input voltage of the conversion unit. The temperature control resistor generates a temperature control voltage according to the current signal. The comparison unit compares the temperature control voltage with a reference voltage to generate a control signal. The control signal represents whether a temperature of the conversion unit reaches an over temperature protection point.

An apparatus measures a junction temperature in an IC through a pin of the IC and concurrently provides a digital input signal to digital logic of the IC through the pin. The IC has an ESD diode structure connected to the pin. High and low side voltage sensors sense a voltage drop across the diode structure. An input multiplexer controlled by the digital input signal selectively connects high and low side current sources to the pin to concurrently provide the digital input signal to the digital logic and to drive a constant current through the diode structure. An output multiplexer controlled by the digital input signal selectively connects the high and low side voltage sensors to an output that provides a sense signal indicative of the IC junction temperature.

Methods of controlling semiconductor device and semiconductor device are provided in which a semiconductor device can define a normally operational ambient temperature at a low level. The Microcontroller includes a logical block, a temperature sensor for measuring junction temperature, a power consumption circuit for consuming predetermined power, and a Controller for controlling the consumption of power by the power consumption circuit such that the temperature measured at the temperature sensor is not less than a predetermined operational lower limit temperature of the logical block 110.

A semiconductor device includes a substrate having a main surface, and a temperature-sensitive diode structure having a trench formed in the main surface, a polysilicon layer embedded in the trench, a p-type anode region formed in the polysilicon layer, and an n-type cathode region formed in the polysilicon layer.

A power supply, method for voltage compensation and electronic device are provided. The power supply includes: a plurality of temperature compensation modules, for providing a plurality of reference voltages respectively based on a plurality of temperature curves which are not identical, and each of the temperature curve linearly characterizing a corresponding relationship between the reference voltage and temperature in a plurality of temperature ranges respectively; and a summation module, for providing an output voltage in accordance with the plurality of reference voltages, wherein for at least one temperature curve, at least two temperature ranges correspond to different temperature coefficients, so that an output voltage curve characterizing the output voltage changing with temperature has not identical temperature coefficients at least in two temperature ranges, and a critical temperature between temperature ranges in the output voltage curve corresponds to a stable output voltage.

[Object] An electric valve control device capable of preventing a start delay of an electric valve control (an opening degree control) by shortening a waiting period of a system control device and an electric valve device including the same are provided. [Solving Means] An electric valve control device 11 outputs a signal indicating an end or an interruption of an initialization operation to an air conditioner ECU 16 after the initialization operation of the electric valve 9 ends or is interrupted.

In an example semiconductor device, the voltage/temperature conditions of the semiconductor device and associated calibration codes of multiple instances of ZQ calibrations are pre-stored in a register array. When a pre-stored voltage/temperature condition occurs again, ZQ calibration is not performed. Instead, the associated pre-stored calibration code is retrieved from the register array and provided to the IO circuit. When a voltage/temperature condition of the semiconductor device does not match any pre-stored voltage/temperature condition in the register array, a ZQ calibration is performed. When the ZQ calibration is performed, a register in the register array is selected according to an update policy and updated by the calibration code newly provided by the ZQ calibration along with the voltage/temperature condition at the time when the ZQ calibration is performed.

Across the entire operating temperature range, and without requiring a new transistor element, the constant voltage output by a constant voltage circuit can be controlled to a voltage greater than or equal to the stop-oscillating voltage and as low as possible. A resistance 11b that negatively feeds back a reference current Iref is connected between the gate and source of a depletion mode n-channel transistor 11a configured to produce the reference current Iref on which the constant voltage VREG is based. The resistance of resistance 11b has a gradient to temperature change of the same sign as the gradient of the difference between the constant voltage and the stop-oscillating voltage to temperature change when the gradient of the resistance value of the resistance to temperature change is 0.

There is provided a reference voltage generator for providing an adaptive voltage. The reference voltage generator includes a steady current source and a PMOS transistor and an NMOS transistor cascaded to each other. A reference voltage provided by the reference voltage generator is determined by gate-source voltages of the PMOS transistor and the NMOS transistor. As said gate-source voltages vary with the temperature and manufacturing process, the reference voltage forms a self-adaptive voltage.

a reference voltage generating circuit that includes a bandgap reference voltage generating circuit main body (10) configured to generate a substantially constant reference voltage at room temperature, a high temperature correction circuit (30) configured to increase a reference voltage generated by the reference voltage generating circuit main body at a high temperature by supplying a high temperature correction current that increases as the temperature increases to the resistor, a low temperature correction circuit (40) configured to increase a reference voltage generated by the reference voltage generating circuit main body at a low temperature by supplying a low temperature correction current that increases as the temperature decreases to the resistor, and a bias circuit (20) configured to generate a bias voltage according to the temperature, so as to control the high temperature correction current and the low temperature correction current at the same time.