A fault-tolerant multiphase voltage regulator includes a plurality of power stages, each of which is configured to deliver a phase current to a processor, and a controller. The controller is configured to: control the plurality of power stages to regulate an output voltage provided to the processor; detect and disable a faulty power stage; generate a throttling signal to indicate if one or more of the power stages is faulty and disabled; and communicate the throttling signal to the processor over a physical line running between the processor and the controller. A corresponding method of operating a fault-tolerant power distribution system is also described.

a reference voltage generating circuit that includes a bandgap reference voltage generating circuit main body (10) configured to generate a substantially constant reference voltage at room temperature, a high temperature correction circuit (30) configured to increase a reference voltage generated by the reference voltage generating circuit main body at a high temperature by supplying a high temperature correction current that increases as the temperature increases to the resistor, a low temperature correction circuit (40) configured to increase a reference voltage generated by the reference voltage generating circuit main body at a low temperature by supplying a low temperature correction current that increases as the temperature decreases to the resistor, and a bias circuit (20) configured to generate a bias voltage according to the temperature, so as to control the high temperature correction current and the low temperature correction current at the same time.

Systems and apparatuses for a configurable, temperature dependent reference voltage generator are provided. An example apparatus includes control logic configured receive temperature data, and produce a signal, based on the temperature data, indicative of the temperature data, a temperature dependence and a temperature slope. The apparatus may also include a temperature slope reference generator configured to produce a reference voltage having the temperature dependence and the temperature slope, based on the signal from the control logic.

There is provided a reference voltage generator for providing an adaptive voltage. The reference voltage generator includes a steady current source and a PMOS transistor and an NMOS transistor cascaded to each other. A reference voltage provided by the reference voltage generator is determined by gate-source voltages of the PMOS transistor and the NMOS transistor. As said gate-source voltages vary with the temperature and manufacturing process, the reference voltage forms a self-adaptive voltage.

Across the entire operating temperature range, and without requiring a new transistor element, the constant voltage output by a constant voltage circuit can be controlled to a voltage greater than or equal to the stop-oscillating voltage and as low as possible. A resistance 11b that negatively feeds back a reference current Iref is connected between the gate and source of a depletion mode n-channel transistor 11a configured to produce the reference current Iref on which the constant voltage VREG is based. The resistance of resistance 11b has a gradient to temperature change of the same sign as the gradient of the difference between the constant voltage and the stop-oscillating voltage to temperature change when the gradient of the resistance value of the resistance to temperature change is 0.

A method and apparatus for implementing a CMOS buffer for driving a reference voltage that consumes very low current in normal operating conditions but drive high current when output voltage is off, tracking the required reference voltage. The circuit is operating in a deadzone most of the time, where pull-up and pull-down current paths are blocked, and ultra-low power comparators, with build-in offset, are monitoring the output voltage continuously, and driving compensation current, when needed. The circuit can be manufactured with a standard CMOS processing technology.

An oscillator control circuit includes a zero-temperature coefficient (ZTC) estimator estimating a ZTC voltage based on a supply voltage supplied to the oscillator and a frequency of an oscillation signal output by the oscillator. The ZTC voltage is the magnitude of the supply voltage VDD which corresponds to the ZTC condition for the oscillator. The ZTC estimator generates a bias control signal such that the magnitude of the supply voltage becomes the ZTC voltage.

Systems and devices are provided for generating a process, voltage, temperature (PVT)-independent reference current in a resource-efficient manner. A semiconductor device may include a bandgap circuit that outputs a reference voltage and gate signal. The semiconductor device may also include a reference current circuit that includes a complementary-to-absolute-temperature (CTAT) current generation portion and a variation-independent reference current generation portion. The variation-independent reference current generation portion may receive the gate signal from the bandgap circuit, apply the gate signal to a proportion-to-absolute temperature (PTAT) branch of the variation-independent reference current generation portion, and generate mirror PTAT and CTAT currents. The reference current circuit may also include a reference node that generates the reference current supply based at least in part on the mirror CTAT current and the mirror PTAT current.

A sub-nW voltage reference is presented that provides inherently low process variation and enables trim-free operation for low-dropout regulators and other applications in nW microsystems. Sixty chips from three different wafers in 180 nm CMOS are measured, showing an untrimmed within-wafer / of 0.26% and wafer-to-wafer / of 1.9%. Measurement results also show a temperature coefficient of 48-124 ppm/ C. from 40 C. to 85 C. Outputting a 0.986V reference voltage, the reference operates down to 1.2V and consumes 114 pW at 25 C.

An intraocular pressure sensor is presented that achieve very low power consumption. The intraocular pressure sensor takes the form of an implantable assembly configured to be implanted in an eye of a subject. Specifically, the implantable assembly is comprised of a capsular tension ring attached to a flexible printed circuit board. The flexible printed circuit board includes a cutout that is sized to encircle the pupil of the eye and is C shaped. One or more electrical components are also mounted onto the flexible printed circuit board. One such component is a voltage reference generator that is implemented by a circuit which provides inherently low process variation and low power consumption.