An adjustable inductance system includes a plurality of inductor modules coupled to a corresponding plurality of loads and a pool of at least one floating inductor module that may be coupled in parallel with any one of the plurality of inductor modules. A control circuit monitors the current drawn through the inductor module by the load. If current draw exceeds a threshold, the control circuit couples a floating inductor module to the load. Using the current drawn by the load, the control circuit determines an appropriate inductance value and determines an appropriate inductor configuration for the inductor module, the floating inductor module, or both the inductor module and the floating inductor module to achieve the determined inductance value. The control circuit causes switching elements to transition to a state or position to achieve the inductor configuration.

Embodiments described herein relate to an LDO circuit device and overcurrent protection circuit of an LDO circuit. An overcurrent protection circuit is added to an LDO circuit to process an output current signal of the LDO circuit. When the output current signal of the LDO circuit increases, a voltage of a gate drive signal of a power switch in the LDO circuit is increased through adjustment performed by the overcurrent protection circuit, thereby declining the current capability of the power switch in the LDO circuit and restricting an output current thereof from continuing to increase. After feedback regulation, the output current of the LDO finally reaches to a stable value.

Reference voltage generation circuits and related methods are disclosed. An example reference voltage generation circuit includes a voltage generating circuit including an enhancement mode (E-mode) gallium nitride (GaN) transistor, the voltage generating circuit to, in response to a first clock signal having a first phase, generate a first voltage associated with the E-mode GaN transistor, and, in response to a second clock signal having a second phase different from the first phase, generate a second voltage associated with the E-mode GaN transistor, and a switching capacitor circuit coupled to the voltage generating circuit, the switching capacitor circuit to generate a reference voltage based on a difference between the first voltage and the second voltage.

A reference voltage generation circuit may include: a first reference current path formed through a first node and a first transistor; a second reference current path formed through a second node and a second transistor; a first feedback loop configured to feed a first current back to the first and second reference current paths such that voltage levels of the first and second nodes are kept the same; and a second feedback loop configured to control the currents flowing through the first and second transistors according to a second current.

An apparatus is provided, where the apparatus includes a first domain including first one or more circuitries, and a second domain including second one or more circuitries. The apparatus may further include a first voltage regulator (VR) to supply power to the first domain from a power bus, a second VR to supply power to the second domain from the power bus, and a third VR coupled between the first and second domains. The third VR may at least one of: transmit power to at least one of the first or second domains, or receive power from at least one of the first or second domains.

An apparatus is provided which comprises: a first voltage regulator; a second voltage regulator; and a switch to selectively couple the first voltage regulator to the second voltage regulator, such that a first output node of the first voltage regulator is temporarily coupled to a second output node of the second voltage regulator via the switch.

Systems and methods as described herein may take a variety of forms. In one example, systems and methods are provided for a circuit for powering a voltage regulator. A voltage regulator circuit has an output electrically coupled to a gate of an output driver transistor, the output driver transistor having a first terminal electrically coupled to a voltage source and a second terminal electrically coupled to a first terminal of a voltage divider, the voltage divider having an second terminal electrically coupled to ground, and the voltage divider having an output of a stepped down voltage. A power control circuitry transistor has a first terminal electrically coupled to the voltage source, the power control circuitry transistor having a second terminal electrically coupled to the gate terminal of the output driver transistor, and the power control circuitry transistor having a gate terminal electrically coupled to a status voltage signal.

A voltage regulator includes a main driving stage circuit, a first pre-driving circuit, a plurality of auxiliary driving stage circuits, a second pre-driving circuit, and a comparison and decoding circuit. The main driving stage circuit provides a main driving current of an output voltage according to a first control signal. Each of the auxiliary driving stage circuits determines whether to provide an auxiliary driving current of the output voltage according to a second control signal. The second pre-driving circuit generates the second control signal according to an enable signal. The comparison and decoding circuit generates a simulated driving current and generates a load current according to a reference current and a counting code, compares the simulated driving current with the load current to generate a comparison result, and generates the enable signal by decoding the comparison result. The counting code is generated according to the comparison result.

A multi-deck circuit arrangement including a first deck circuit having a negative supply terminal and a second deck having a positive supply terminal connected to the negative supply terminal. A single power supply provides a voltage across both the first and second decks. The total power consumption will be less than the prior art of having both deck circuits conventionally regulated. The supply rail connecting the second deck's positive supply terminal to the first deck's negative supply terminal may be regulated. In one embodiment, the rail voltage can be controlled to optimize deck circuit operation for speed and power and to avoid level shifters when interfacing to other circuits.

An apparatus comprises a first power supply, a second power supply, and a controller. The first power supply supplies a first input voltage to power a first input of a load over a first circuit path. The second power supply supplies a second input voltage to power a second input of the load over a second circuit path. The controller controls connectivity of the first circuit path to the second circuit path as a function of the first input voltage and the second input voltage during at least ramp up or ramp down of either or both of the first input voltage and the second input voltage.