According to one embodiment, a constant voltage circuit includes: a first gain stage configured to output a first voltage amplified based on an output voltage and a reference voltage; a first transistor configured to control the output voltage based on the first voltage; a second transistor configured to control a current that flows through the first gain stage; a first circuit configured to convert an amount of fluctuation in the output voltage into a first current; and a second circuit configured to control a gate voltage of the second transistor based on the first current. A third current or a fourth current greater than the third current flows through the first gain stage based on the gate voltage of the second transistor.

A semiconductor device includes a regulator circuit, a wire, n load circuits, and an analog circuit. The wire is connected to the regulator circuit and including n connection nodes (n is an integer of 2 or more). The n load circuits are connected to the n connection nodes, respectively. The analog circuit is connected between the n connection nodes and the regulator circuit. The analog circuit is configured to generate an average voltage of n voltages at the n connection nodes. The regulator circuit is configured to generate an output voltage supplied to the wire based on the average voltage generated by the analog circuit.

A method is for operating an electronic device formed by a low dropout regulator (LDO) having an output coupled to a first conduction terminal of a transistor, with a second conduction terminal of the transistor being coupled to an output node. The electronic device is turned on by turning on the LDO, removing a DC bias from the second conduction terminal of the transistor by opening a first switch that selectively couples the second conduction terminal of the transistor to a supply node through a first diode coupled transistor and by opening a second switch that selectively couples the second conduction terminal of the transistor to a ground node through a second diode coupled transistor, and turning on the transistor. The electronic device is turned off by turning off the transistor, forming the DC bias at the second conduction terminal of the transistor, and turning off the LDO.

Disclosed is a semiconductor integrated circuit for a regulator, including: a voltage control transistor connected between a voltage input terminal to which a DC voltage is input and an output terminal; a control circuit that controls the voltage control transistor according to a feedback voltage of an output; a first transistor which is provided in parallel with the voltage control transistor and to which an electric current in a proportional reduction from an electric current flowing to the voltage control transistor flows; a first comparison circuit that determines which of the electric current flowing to the first transistor and a predetermined current value is larger; and a first output terminal for outputting the determination result. An output of the first comparison circuit is inverted in response to the flowing to the first transistor of the electric current smaller than a preset rotation lock detection current value.

A semiconductor device according to the present embodiment includes a plurality of switching elements and a plurality of variable capacitance elements. The switching elements are switching elements connected in series between a first control terminal and a second control terminal and plural types of capacitance control signals can be supplied to the first control terminal and the second control terminal. The variable capacitance elements have capacitance control terminals connected to corresponding one ends of the switching elements, respectively.

A negative feedback circuit, comprising a node, and a control circuit coupled to the node, wherein the control circuit is configured to provide a stabilizing signal in response to a noise signal coupling to the node from a power rail, and the stabilizing signal is configured to reduce the noise signal at the node and the power rail.

A switching converter includes a voltage conversion circuit providing an output voltage from an input voltage and a PWM voltage generated in response to first and second oscillating voltages. The input stage of a transconductor circuit provides an input reference current following a difference between a reference voltage and a voltage dependent on the output voltage and according to a transconductance, and an output stage for providing an output reference current from the input reference current. A phase shifter shifts an oscillating reference voltage according to the output reference current to obtain the first and second oscillating voltages. The transconductance is controlled in response to the input voltage resulting in a change of the input reference current. Compensation for that change is provided by subtracting a variable compensation current from the input reference current, where the variable compensation current is generated in response to the input voltage.

Disclosed is an integrated circuit including a first bias current generating circuit. The first bias current generating circuit includes a first amplifier receiving a reference voltage and a first voltage and amplifying a difference between them to output a first output voltage, a first bias current generator receiving the first output voltage and outputting a first bias current in response to the first output voltage, a variable resistor receiving the first bias current and outputting the first voltage in response to the first bias current and a calibration code, a second bias current generator receiving the first output voltage and outputting a second bias current to a peripheral circuit in response to the first output voltage, and a third bias current generator receiving the first output voltage and outputting a third bias current to an external device through a first pad in response to the first output voltage.

A voltage-to-current converter includes a first transistor having a drain coupled to a first node, a second transistor having a drain coupled to the first node, an operational amplifier having a first input terminal configured to receive a reference voltage and a second input terminal coupled to a source of the first transistor or a source of the second transistor, a control circuit having an input terminal coupled to an output terminal of the operational amplifier, a first output terminal coupled to a gate of the first transistor, and a second output terminal coupled to a gate of the second transistor, a first resistor coupled between the source of the first transistor and a ground, and a second resistor coupled between the source of the second transistor and the ground. An output current of the voltage-to-current converter is generated from the first node.

To provide a digitally controlled LDO regulator that can control an output voltage even during an auto-zero processing period. A digitally controlled low dropout regulator is provided that includes a plurality of AD converters and an impedance variable circuit, each of the plurality of AD converters including a comparator, in which a first signal from each of the plurality of AD converters is input to the impedance variable circuit; a second signal output from the impedance variable circuit is input to one of two terminals of each of the plurality of AD converters; when one of the plurality of AD converters is in operation, another of the plurality of AD converters performs auto-zero processing to set a voltage value used as a reference; and the comparator compares a voltage value of the second signal input to the one of the two terminals with the set voltage value.