Methods, systems and apparatuses may provide for technology that includes a system on chip (SoC) having an integrated voltage regulator and a power management controller, and a first communication path coupled to the power management controller, wherein the first communication path is to carry power error information to the power management controller. The technology may also include a second communication path coupled to an error pin of the SoC, wherein the second communication path is to carry the power error information to the error pin, and wherein the power error information is associated with the integrated voltage regulator.

A power control device includes: an output voltage controller configured to control an output voltage based on a feedback voltage corresponding to the output voltage; and an overvoltage protector configured to continue or stop the operation of the output voltage controller based on a first detection result of whether the output voltage has exceeded an output voltage threshold value and a second detection result of whether the feedback voltage has fallen to or below a feedback voltage threshold value.

The disclosure includes a differential amplifier generating a difference voltage representing a difference between a reference voltage and a divided voltage obtained by dividing an inter-terminal voltage between a first and second terminals, a first transistor having a drain and a source connected to the first terminal and the second terminal, a voltage detection unit generating a detection voltage having a voltage value corresponding to the inter-terminal voltage, and a selection unit supplying one of the difference voltage and the detection voltage to a gate of the first transistor based on the inter-terminal voltage.

A voltage regulator coupled between a first node and second node includes a first (full-power) regulator circuit and a second (low-power) regulator circuit. In a first mode: the first regulator circuit is activated (with the second regulator circuit inactive) when the voltage at the first node is a battery voltage, and the voltage regulator is kept de-activated when the voltage at the first node is a ground voltage. In a second mode: the first regulator circuitry in is active (with the second regulator circuitry inactive) when the voltage at the first node is a battery voltage, and the voltage regulator is inactive when the voltage at the first node is a ground voltage. In a third mode: the second regulator circuitry is active (with the first regulator circuitry inactive) irrespective of the voltage at the first node being at the battery voltage or the ground voltage.

Systems, methods, and circuitries are provided to generate a regulated supply voltage based on a target voltage. In one example, a method includes converting the target voltage to a first digital time-based signal and converting the regulated supply voltage to a second digital time-based signal. A difference signal is generated based at least on a difference between the first digital time-based signal and the second digital time-based signal. Regulator circuitry is controlled to generate the regulated supply voltage based at least on the difference signal.

A circuit and a method using a pass device that is coupled between a supply voltage level and a load-connectable node of the circuit for providing a load current. A sense device forms a current mirror with the pass device. The sense device has transistor devices that can be switched to an active state, to adjust a mirror ratio of the current mirror. A first feedback loop regulates a voltage drop across the pass device to a predetermined value. A second feedback loop regulates a voltage drop across the sense device to the voltage drop across the pass device. Measurement circuitry sets a mirror ratio of the current mirror based on an indication of a current flowing through the sense device and generates an indication of current flowing through the pass device based on the set mirror ratio and the indication of the current flowing through the sense device.

An adaptive gate driver for a driving a power MOSFET to switch is disclosed. The adaptive gate driver includes a load sense circuit to sense a current through the power MOSFET. A controller coupled to the load sense circuit compares the sensed current to a threshold to determine if the load on the power MOSFET is a normal load or a heavy load. Based on the comparison, the controller controls the gate driver to drive the power MOSFET with a first strength level when a normal load determined and at second strength level when a heavy load is determined. The driving strength in the heavy-load condition is lower than the normal-load condition and by lowering the driving strength of the gate driver during the heavy-load condition a voltage across the power MOSFET may be prevented from exceeding a threshold related to a breakdown condition during a switching period.

A digital regulator at least includes a comparator, a hysteresis comparator, a first control circuit, a second control circuit, a first transistor, and a second transistor. The comparator compares a reference voltage with an internal voltage, so as to generate a first control voltage. The hysteresis comparator compares the reference voltage with the internal voltage, so as to generate a second control voltage. The first transistor is coupled between a relatively high internal voltage and a control node. The first transistor is controlled by the first control circuit according to the first control voltage and the second control voltage. The second transistor is coupled between the control node and the internal voltage. The second transistor is controlled by the second control circuit according to the first control voltage and the second control voltage.

A cargo handling system is disclosed. In various embodiments, the cargo handling system includes a direct current power bus; a motor connected to the direct current power bus and having a flux reference input; a unit controller connected to the motor and configured to detect a level of regenerative energy on the direct current power bus and to alter the flux reference input in response to the level of regenerative energy.

During operation of an IC component within a first range of temperatures, a first bias voltage is applied to a first substrate region disposed adjacent a first plurality of transistors to effect a first threshold voltage for the first plurality of transistors. During operation of the IC component within a second range of temperatures that is distinct from and lower than the first range of temperatures, a second bias voltage is applied to the first substrate region to effect a second threshold voltage for the first plurality of transistors that is at least as low as the first threshold voltage.