Patent classifications
G05F1/575
Dual loop voltage regulator utilizing gain and phase shaping
A voltage regulator that includes a first amplifier, a second amplifier, a summer, and a transistor is presented. The first amplifier has a first gain and a first frequency bandwidth, and is configured to generate a first voltage output. The second amplifier has a second gain that is lower than the first gain and a second frequency bandwidth that is higher than the first frequency bandwidth, and is configured to generate a second voltage output. The summer is configured to generate a summed voltage output. The transistor is connected to the summer and configured to generate a regulated voltage based on the summed voltage output of the summer.
Voltage regulation circuit
A voltage regulation circuit includes a node, a voltage regulator, a plurality of load units and a voltage feedback circuit. The node has a node voltage. The voltage regulator is electrically connected to the node. The load units are electrically connected to the voltage regulator via the node. The load units are driven by the node voltage and have at least one load state. The voltage feedback circuit is electrically connected between the voltage regulator and the node. The voltage feedback circuit includes a switch and receives the node voltage and a control signal. The control signal includes the at least one load state. The voltage feedback circuit controls the switch according to the at least one load state of the control signal to output a feedback voltage. The voltage regulator adjusts the node voltage according to the feedback voltage.
Voltage regulation circuit
A voltage regulation circuit includes a node, a voltage regulator, a plurality of load units and a voltage feedback circuit. The node has a node voltage. The voltage regulator is electrically connected to the node. The load units are electrically connected to the voltage regulator via the node. The load units are driven by the node voltage and have at least one load state. The voltage feedback circuit is electrically connected between the voltage regulator and the node. The voltage feedback circuit includes a switch and receives the node voltage and a control signal. The control signal includes the at least one load state. The voltage feedback circuit controls the switch according to the at least one load state of the control signal to output a feedback voltage. The voltage regulator adjusts the node voltage according to the feedback voltage.
Voltage regulator
A voltage regulator is provided. The voltage regulator includes a main error amplifier, a first buffer, a second buffer, and multiple main zero compensation loops. The main error amplifier generates a first voltage signal according to a reference voltage signal and a feedback voltage signal. The first buffer provides a second voltage signal according to the first voltage signal. The second buffer provides an output voltage signal according to the second voltage signal. The main zero compensation loops are respectively coupled between an output terminal of the main error amplifier and an output terminal of the first buffer. The main zero compensation loops provide different zero compensations.
Voltage regulator
A voltage regulator is provided. The voltage regulator includes a main error amplifier, a first buffer, a second buffer, and multiple main zero compensation loops. The main error amplifier generates a first voltage signal according to a reference voltage signal and a feedback voltage signal. The first buffer provides a second voltage signal according to the first voltage signal. The second buffer provides an output voltage signal according to the second voltage signal. The main zero compensation loops are respectively coupled between an output terminal of the main error amplifier and an output terminal of the first buffer. The main zero compensation loops provide different zero compensations.
IMPROVING PSRR ACROSS LOAD AND SUPPLY VARIANCES
Described embodiments include a circuit for reducing output voltage noise in a voltage regulator includes an amplifier having first and second amplifier inputs, a compensation terminal and an amplifier output. The first amplifier input is coupled to a reference voltage terminal, and the compensation terminal coupled to an output terminal. A buffer amplifier has a buffer input and a buffer output, and the buffer input is coupled to the amplifier output. A first transistor is coupled between a supply voltage terminal and the output terminal, and has a first control terminal that is coupled to the buffer output. A boost current injection circuit has a boost input and a boost output, and the boost input is coupled to the supply voltage terminal. A second transistor is coupled between the boost output and the compensation terminal, and has a second control terminal.
Processing system, corresponding apparatus and corresponding method
An integrated circuit includes a clock control circuit coupled to a reference clock signal node and a plurality of circuits including a voltage regulator, a digital circuit, and an analog circuit. The voltage regulator, in operation, supplies a regulated voltage. The clock control circuit, in operation, generates a system clock. Input/output interface circuitry is coupled to the plurality of circuits and a common input/output node. The input/output interface circuitry, in operation, selectively couples one of the plurality of circuits to the common input/output node.
Processing system, corresponding apparatus and corresponding method
An integrated circuit includes a clock control circuit coupled to a reference clock signal node and a plurality of circuits including a voltage regulator, a digital circuit, and an analog circuit. The voltage regulator, in operation, supplies a regulated voltage. The clock control circuit, in operation, generates a system clock. Input/output interface circuitry is coupled to the plurality of circuits and a common input/output node. The input/output interface circuitry, in operation, selectively couples one of the plurality of circuits to the common input/output node.
Providing low power charge pump for integrated circuit
In one embodiment, an apparatus includes: an amplifier to compare a reference voltage to a feedback voltage and to output a comparison signal based on the comparison; a loop circuit coupled to the amplifier, where the loop circuit is to receive the comparison signal and provide a regulated voltage to the amplifier as the feedback voltage in a first mode of operation, and in a second mode of operation to provide a predetermined feedback ratio point to the amplifier as the feedback voltage; and an output device coupled to the amplifier. The output device may be configured to receive a supply voltage and the comparison signal and output the regulated voltage at an output node based at least in part on the comparison signal.
Providing low power charge pump for integrated circuit
In one embodiment, an apparatus includes: an amplifier to compare a reference voltage to a feedback voltage and to output a comparison signal based on the comparison; a loop circuit coupled to the amplifier, where the loop circuit is to receive the comparison signal and provide a regulated voltage to the amplifier as the feedback voltage in a first mode of operation, and in a second mode of operation to provide a predetermined feedback ratio point to the amplifier as the feedback voltage; and an output device coupled to the amplifier. The output device may be configured to receive a supply voltage and the comparison signal and output the regulated voltage at an output node based at least in part on the comparison signal.