Patent classifications
G06F1/3206
ENHANCED POWER MANAGEMENT FOR SUPPORT OF PRIORITY SYSTEM EVENTS
Embodiments are generally directed to enhanced power management for support of priority system events. An embodiment of a system includes a processing element; a memory including a registry for information regarding one or more system events that are designated as priority events; a mechanism to track operation of events that requires Turbo mode operation for execution; and a power control unit to implement a power management algorithm. The system is to maintain an first energy budget and a second residual energy budget for operation in a Turbo power mode, and wherein the power management algorithm is to determine whether to authorize execution of a detected system event in the Turbo power mode based on the second residual energy budget upon determining that the first energy budget is not sufficient for execution of the detected system event and that the detected system event is designated as a priority event. Priority designations for the priority events may include a first High Priority designation and a second Critical designation.
ENHANCED POWER MANAGEMENT FOR SUPPORT OF PRIORITY SYSTEM EVENTS
Embodiments are generally directed to enhanced power management for support of priority system events. An embodiment of a system includes a processing element; a memory including a registry for information regarding one or more system events that are designated as priority events; a mechanism to track operation of events that requires Turbo mode operation for execution; and a power control unit to implement a power management algorithm. The system is to maintain an first energy budget and a second residual energy budget for operation in a Turbo power mode, and wherein the power management algorithm is to determine whether to authorize execution of a detected system event in the Turbo power mode based on the second residual energy budget upon determining that the first energy budget is not sufficient for execution of the detected system event and that the detected system event is designated as a priority event. Priority designations for the priority events may include a first High Priority designation and a second Critical designation.
POWER MONITOR
A power monitor includes a detecting circuit, a processing circuit, and a warning circuit. The detecting circuit detects a first abnormal condition of a primary side circuit and a second abnormal condition of a secondary side circuit. The processing circuit calculates a first class and a first occurring number of the first abnormal condition, and calculates a second class and a second occurring number of the second abnormal condition. The processing circuit determines whether the first occurring number is larger than a first predetermined number corresponding to the first class; if it is, the processing circuit outputs a first abnormal signal. The processing circuit determines whether the second occurring number is larger than a second predetermined number corresponding to the second class; if it is, the processing circuit outputs a second abnormal signal. The warning circuit outputs a warning signal according to the first or the second abnormal signal.
POWER MONITOR
A power monitor includes a detecting circuit, a processing circuit, and a warning circuit. The detecting circuit detects a first abnormal condition of a primary side circuit and a second abnormal condition of a secondary side circuit. The processing circuit calculates a first class and a first occurring number of the first abnormal condition, and calculates a second class and a second occurring number of the second abnormal condition. The processing circuit determines whether the first occurring number is larger than a first predetermined number corresponding to the first class; if it is, the processing circuit outputs a first abnormal signal. The processing circuit determines whether the second occurring number is larger than a second predetermined number corresponding to the second class; if it is, the processing circuit outputs a second abnormal signal. The warning circuit outputs a warning signal according to the first or the second abnormal signal.
PERFORMANCE LEVEL CONTROL IN A DATA PROCESSING APPARATUS
A single communication fabric for a data processing apparatus is provided. The fabric has an interconnection network to provide a topology of data communication channels between a plurality of data-handling functional units. The interconnection network has a first interconnection domain to provide data communication between a first subset of the data-handling functional units and a second interconnection domain to provide data communication between a second subset of the data-handling functional units. The power management circuitry is arranged to control a first performance level for the first interconnection domain independently from control of a second performance level for the second interconnection domain. Machine readable instructions and a method are provided to concurrently set performance levels of two different fabric domains to respective different operating frequencies.
SYSTEMS, DEVICES AND METHODS FOR POWER MANAGEMENT AND POWER ESTIMATION
A microcontroller powered by a power management integrated circuit (PMIC) includes a plurality of cores. A first core of the microcontroller can be configured to implement a system power transient management component. One or more other or second cores of the microcontroller can be configured to implement one or more applications. The system power transient management component implemented by the first core can be configured to dynamically identify an expected load transient event to occur in the microcontroller, determine power control data to optimize a response to the identified expected load transient event, the power control data comprising a power control mode and associated parameters, and provide the power control data to the power management integrated circuit (PMIC).
SYSTEMS, DEVICES AND METHODS FOR POWER MANAGEMENT AND POWER ESTIMATION
A microcontroller powered by a power management integrated circuit (PMIC) includes a plurality of cores. A first core of the microcontroller can be configured to implement a system power transient management component. One or more other or second cores of the microcontroller can be configured to implement one or more applications. The system power transient management component implemented by the first core can be configured to dynamically identify an expected load transient event to occur in the microcontroller, determine power control data to optimize a response to the identified expected load transient event, the power control data comprising a power control mode and associated parameters, and provide the power control data to the power management integrated circuit (PMIC).
Synchronizing a device that has been power cycled to an already operational system
A method comprises a system comprising a host device coupled to a first remote device actively operating according to a state diagram that the host device and all remote devices follow during operation of the system. The method further comprises powering up a second remote device while the host device and first remote device are actively operating according to the state diagram. The second remote device waits for a synchronization point sequence. Upon detecting the synchronization point sequence, the second remote device implements a predetermined feature set and synchronizes itself to the state diagram at a common point as the host device and first remote device.
Synchronizing a device that has been power cycled to an already operational system
A method comprises a system comprising a host device coupled to a first remote device actively operating according to a state diagram that the host device and all remote devices follow during operation of the system. The method further comprises powering up a second remote device while the host device and first remote device are actively operating according to the state diagram. The second remote device waits for a synchronization point sequence. Upon detecting the synchronization point sequence, the second remote device implements a predetermined feature set and synchronizes itself to the state diagram at a common point as the host device and first remote device.
Method for conserving power on a portable electronic device and a portable electronic device configured for the same
The present disclosure describes a method for conserving power on a portable electronic device and a portable electronic device configured for the same. In accordance with one embodiment, there is provided a method for conserving power comprising: switching a portable electronic device to a low power mode in response to a trigger condition; and switching the portable electronic device from the low power mode to a full power mode on the portable electronic device in response to detection of a designated wake-up gesture on a touch-sensitive overlay of the portable electronic device.