This specification discloses methods and systems for implementing a chip integrated scope (i.e., chip scope (CS)), which is a feature that allows a user to scope RF signals (internally and externally to the DUT (device under test)), by using the RF receive path (including amplifier, filter, ADC, DSP) to capture and store signal traces. In some embodiments, this specification discloses methods and systems to enhance the resolution and accuracy of these signal traces by using raw and correction data for gain/phase compensation of gain/phase impairments introduced in the Rx (receiver) path. In some embodiments, the correction data is generated from one or more of the following: simulation data, characterization data, production test data

A system and an accelerator circuit including a register file comprising instruction registers to store an instruction for evaluating an elementary function, and data registers comprising a first data register to store an input value. The accelerator circuit further includes a successive cumulative rotation circuit comprising a reconfigurable inner stage to perform a successive cumulative rotation recurrence, and a determination circuit to determine a type of the elementary function based on the instruction, and responsive to determining that the input value is a fixed-point number, configure the reconfigurable inner stage to a configuration for evaluating the type of the elementary function, wherein the successive cumulative rotation circuit is to calculate an evaluation of the elementary function using the reconfigurable inner stage performing the successive cumulative rotation recurrence.

A device, user interface and method for searching a data set presented on a display of the device are disclosed. The method for searching a large data set comprises displaying content comprising at least a portion of the data set in a content window on the display, displaying a slider moveable along a selection path on the display, wherein the selection path corresponds to a range of a field corresponding to a subset of the data set, moving the slider along the selection path to make a selection of a range of the field, displaying the subset of the data set corresponding to the selection in the content window, automatically returning the slider to a return position after the selection has been made and continuing to display the subset of data corresponding to the selection.

Apparatus for evaluating a mathematical function for a received input value includes a polynomial block configured to identify a domain interval containing the received input value over which the mathematical function can be evaluated, the mathematical function over the identified interval being approximated by a polynomial function; and evaluate the polynomial function for the received input value using a set of one or more stored values representing the polynomial function over the identified interval to calculate a first evaluation of the mathematical function for the received input value; and a CORDIC block for performing a CORDIC algorithm, configured to initialise the CORDIC algorithm using the first evaluation of the mathematical function for the received input value calculated by the polynomial block; and implement the CORDIC algorithm to calculate a refined evaluation of the mathematical function for the received input value.

Various embodiments of the present technology comprise a method and apparatus for an encoder. In various embodiments, the encoder is configured to remove impairments from the signals produced by a servo motor and compute a phase that is used to determine the rotary position of the servo motor. In various embodiments, the encoder is configured to remove a DC offset, improve amplitude mismatch, and compute a phase offset.

Apparatus for evaluating a mathematical function for a received input value includes a polynomial block configured to identify a domain interval containing the received input value over which the mathematical function can be evaluated, the mathematical function over the identified interval being approximated by a polynomial function; and evaluate the polynomial function for the received input value using a set of one or more stored values representing the polynomial function over the identified interval to calculate a first evaluation of the mathematical function for the received input value; and a CORDIC block for performing a CORDIC algorithm, configured to initialise the CORDIC algorithm using the first evaluation of the mathematical function for the received input value calculated by the polynomial block; and implement the CORDIC algorithm to calculate a refined evaluation of the mathematical function for the received input value.

A reduced COordinate Rotation DIgital Computer (CORDIC) cell in a parallel CORDIC has an xy-path from x and y inputs to x and y outputs, and a z-path from a z-input to a z-output. Bit-shifts in the xy-path are hardwired. The z-path has a shortened adder/subtractor with a built-in or hardwired fixed parameter. Input bits from the z-input are split into most significant and least significant bits. The number of most significant bits equals the shortened adder/subtractor width. The most significant bits are input to the non-inverting inputs of the adder/subtractor for calculating the most significant z-output bits. The least significant bits are connected directly (or via buffers) from the z-input to the z-output.

An arithmetic processing device includes a processor that calculates a constant multiplication value by multiplying a constant value obtained by dividing a first value by a natural logarithm of 2 and a data value, separates the constant multiplication value into an integer portion and a fractional portion, calculates a fractional power value corresponding to a value of the fractional portion, calculates an integer power value corresponding to a value obtained by multiplying a value of the integer portion by a second value, calculates a power addition value by adding the fractional power value and the integer power value, calculate a power subtraction value by subtracting the integer power value from the fractional power value, and calculate a division value by dividing the power subtraction value by the power addition value as a result of an execution of an arithmetic operation of a hyperbolic tangent function with the data value.

A magnetic field sensor configured to sense an angle of a magnetic field associated with a rotatable target includes a first magnetic field sensing structure configured to generate a first signal indicative of the magnetic field and a second magnetic field sensing structure configured to generate a second signal indicative of the magnetic field, wherein the first and second magnetic field sensing structures are configured to detect quadrature components of the magnetic field. A controller responsive to the first and second signals includes an angle tracking observer having a sine block and a cosine block operatively coupled to compute the angular position of the target using a control loop based in part on a non-orthogonality error term and a magnitude calculator that uses the sine block and the cosine block to compute a magnitude of the magnetic field.

Aspects for generating a dot product for two vectors in neural network are described herein. The aspects may include a controller unit configured to receive a transcendental function instruction that includes an address of a vector and an operation code that identifies a transcendental function. The aspects may further include a CORDIC processor configured to receive the vector that includes one or more elements based on the address of the vector in response to the transcendental function instruction. The CORDIC processor may be further configured to apply the transcendental function to each element of the vector to generate an output vector.