Systems and methods for end-to-end encryption of a web browsing process are described herein. A web query is encrypted at a client using a homomorphic encryption scheme. The encrypted query is sent to a server where the encrypted query is evaluated over web content to generate an encrypted response without decrypting the encrypted query and without decrypting the response. The encrypted response is sent to the client where it is decrypted to obtain the results of the query without revealing the query or results to the owner of the web content, an observer, or an attacker.

A logic circuit comprising a logic sub-circuit arranged to output a stream, S1, of Fresnel lens values, F(x), of a Fresnel lens for display on [m×n] pixels of a pixelated display device. In a first step, the logic circuit is arranged to set an initial data value stored in a first data register unit of the logic sub-circuit to (a−k).sup.2 and set an initial data value stored in a second data register unit of the logic sub-circuit to a.sup.2−(a−k).sup.2. In a second step the logic circuit is arranged to read the initial data value stored in the first data register unit and the initial data value stored in the second data register unit in a first iteration, and to read the data value stored in the first data register unit in the preceding iteration and the data value stored in the second data register unit in the preceding iteration, in a further iteration. In a third step, the logic circuit is arranged to sum the data value read from the first data register unit and the data value read from the second data register unit to form x.sup.2. In a fourth step, the logic circuit is arranged to calculate F(x) based on x.sup.2. In a fifth step, the logic circuit is arranged to output F(x) as the next value in the stream of F(x) values. In a sixth step, the logic circuit is arranged to write x.sup.2 to the first data register unit. In a seventh step, the logic circuit is arranged to add 2k.sup.2 to the value stored in the second data register unit. In an eighth step, the logic circuit is arranged to perform further iterations that repeat the second to seventh steps for x=a+k, a+2k, a+3k . . . a+(n−1)k, wherein a is the starting value of x, k is an increment in x and F(a) is the first value of stream, S1.

Technologies for memory and I/O efficient operations on homomorphically encrypted data are disclosed. In the illustrative embodiment, a cloud compute device is to perform operations on homomorphically encrypted data. In order to reduce memory storage space and network and I/O bandwidth, ciphertext blocks can be manipulated as data structures, allowing operands for operations on a compute engine to be created on the fly as the compute engine is performing other operations, using orders of magnitude less storage space and bandwidth.

Disclosed is system and method for determining treatment effect in a clinical trial, the system comprising a server arrangement communicably coupled to a database arrangement. The server arrangement is configured to receive a plurality of datasets corresponding to a plurality of subjects from the database arrangement, wherein the plurality of subjects comprises a first set of subjects undergoing treatment and a second set of subjects receiving placebo, and wherein the plurality of datasets comprises of plurality independent variables and at least one dependent variables for the plurality of subjects. The system is configured to impute one or more values in the plurality of datasets to generate an imputed dataset of the plurality of subjects, wherein the imputed dataset comprises of imputed and non-imputed values corresponding to the plurality of independent variables and the at least one dependent variable. The system is further configured to normalize the imputed dataset corresponding to the plurality of independent variable of the plurality of subjects, determine a plurality of weightage score of the plurality of independent variables with respect to the at least one dependent variable of the second set of subjects, determine a plurality of similarity score between each of the first set of subjects undergoing treatment to each of the second set of subjects receiving placebo, determine a placebo effect for each of the first set of subjects undergoing treatment, and determine a treatment effect for each of the first set of subjects undergoing treatment.

Disclosed is system and method for determining treatment effect in a clinical trial, the system comprising a server arrangement communicably coupled to a database arrangement. The server arrangement is configured to receive a plurality of datasets corresponding to a plurality of subjects from the database arrangement, wherein the plurality of subjects comprises a first set of subjects undergoing treatment and a second set of subjects receiving placebo, and wherein the plurality of datasets comprises of plurality independent variables and at least one dependent variables for the plurality of subjects. The system is configured to impute one or more values in the plurality of datasets to generate an imputed dataset of the plurality of subjects, wherein the imputed dataset comprises of imputed and non-imputed values corresponding to the plurality of independent variables and the at least one dependent variable. The system is further configured to normalize the imputed dataset corresponding to the plurality of independent variable of the plurality of subjects, determine a plurality of weightage score of the plurality of independent variables with respect to the at least one dependent variable of the second set of subjects, determine a plurality of similarity score between each of the first set of subjects undergoing treatment to each of the second set of subjects receiving placebo, determine a placebo effect for each of the first set of subjects undergoing treatment, and determine a treatment effect for each of the first set of subjects undergoing treatment.

A forward number-theoretic transform dedicated hardware unit is configured to calculate a number-theoretic transform of an input vector, wherein a root of unity of the number-theoretic transform performed by the forward number-theoretic transform dedicated hardware unit is a power of two. The forward number-theoretic transform dedicated hardware unit includes data routing paths, a plurality of hardware binary bit shifters, and a plurality of adders.

A forward number-theoretic transform dedicated hardware unit is configured to calculate a number-theoretic transform of an input vector, wherein a root of unity of the number-theoretic transform performed by the forward number-theoretic transform dedicated hardware unit is a power of two. The forward number-theoretic transform dedicated hardware unit includes data routing paths, a plurality of hardware binary bit shifters, and a plurality of adders.

Systems and processes are provided to detect an balanced audio signal and generation of an unbalanced audio signal including a first audio input for receiving a first audio signal, a second audio input for receiving a second audio signal, a processor for determining a first root mean square value for the first audio signal, a second root mean square value for the second audio signal and a combined root mean square value for a sum of the first audio signal and the second audio signal, the processor being further operative to generate an unbalanced audio signal in response to the first root mean square value exceeding a first threshold value, the second root mean square value exceeding the first threshold value and the combined root mean square value being less than a second threshold value, and an audio decoder operative to decode the unbalanced audio signal.

Systems and processes are provided to detect an balanced audio signal and generation of an unbalanced audio signal including a first audio input for receiving a first audio signal, a second audio input for receiving a second audio signal, a processor for determining a first root mean square value for the first audio signal, a second root mean square value for the second audio signal and a combined root mean square value for a sum of the first audio signal and the second audio signal, the processor being further operative to generate an unbalanced audio signal in response to the first root mean square value exceeding a first threshold value, the second root mean square value exceeding the first threshold value and the combined root mean square value being less than a second threshold value, and an audio decoder operative to decode the unbalanced audio signal.

In an aspect, a processor includes circuitry for iterative refinement approaches, e.g., Newton-Raphson, to evaluating functions, such as square root, reciprocal, and for division. The circuitry includes circuitry for producing an initial approximation; which can include a LookUp Table (LUT). LUT may produce an output that (with implementation-dependent processing) forms an initial approximation of a value, with a number of bits of precision. A limited-precision multiplier multiplies that initial approximation with another value; an output of the limited precision multiplier goes to a full precision multiplier circuit that performs remaining multiplications required for iteration(s) in the particular refinement process being implemented. For example, in division, the output being calculated is for a reciprocal of the divisor. The full-precision multiplier circuit requires a first number of clock cycles to complete, and both the small multiplier and the initial approximation circuitry complete within the first number of clock cycles.