This invention relates to a computer-implemented method for enabling zero-knowledge proof or verification of a statement (S) in which a prover proves to a verifier that a statement is true while keeping a witness (W) to the statement a secret. The method includes sending to the verifier a statement (S) represented by an arithmetic circuit configured to implement a function circuit and determine whether a function circuit output (h) and an elliptic curve point (P), the function circuit input (s) to a wire of the function circuit is equal to the corresponding elliptic curve point multiplier (s); individual wire commitments and a batched commitment for wires of the circuit; a function circuit output (h); proving key (PrK) to enable the verifier to determine that the circuit is satisfied and calculate the elliptic curve point (P) to validate the statement, determin that the prover holds the witness (w) to the statement.

Embodiments are directed to a digital signature verification engine for reconfigurable circuit devices. An embodiment of an apparatus includes one or more processors; and a reconfigurable circuit device, the reconfigurable circuit device including digital signal processing (DSP) blocks and logic elements (LEs), wherein the one or more processors are to configure the reconfigurable circuit device to operate as a signature verification engine for a bit stream, the signature verification engine including a hybrid multiplication unit, the hybrid multiplication unit combining a set of LEs and a set of the DSPs to multiply operands for signature verification.

The cyber owner of the asset can transfer cyber ownership to a second entity based on a transaction and using an escrow entity. An escrow service in association with an escrow entity is utilized to secure transfer of ownership to the second entity in accordance with the conditions of the transaction. The cyber owner initiates an escrow process by transmitting an escrow instruction to the access configuration controller. A new cryptographic key is generated responsive to the escrow instruction and is managed by a generated escrow policy indicating an escrow period. Different components of the cryptographic key are transmitted to the second entity and the escrow service. When the conditions of the transaction are satisfied during the escrow period, the escrow service transmits the component of the cryptographic key to the second entity. The second entity may use the recomposed cryptographic key to assert ownership of the asset.

In one embodiment, an apparatus includes: a hardware accelerator to execute cryptography operations including a Rivest Shamir Adleman (RSA) operation and an elliptic curve cryptography (ECC) operation. The hardware accelerator may include: a multiplier circuit comprising a parallel combinatorial multiplier; and an ECC circuit coupled to the multiplier circuit to execute the ECC operation. The ECC circuit may compute a prime field multiplication using the multiplier circuit and reduce a result of the prime field multiplication in a plurality of addition and subtraction operations for a first type of prime modulus. The hardware accelerator may execute the RSA operation using the multiplier circuit. Other embodiments are described and claimed.

A method of performing finite field addition and doubling operations in an elliptic curve cryptography (ECC) authentication scheme as a countermeasure to side-channel attack. The addition and doubling operations are executed using atomic patterns that involve the same sequence and number of operation types, so that the noise consumption and electromagnetic emanation profile of circuitry performing the operations is identical regardless of operation. A subtraction operation using such an atomic pattern is also disclosed.

In one embodiment, an apparatus comprises a multiplier circuit to: identify a point multiply operation to be performed by the multiplier circuit, wherein the point multiply operation comprises point multiplication of a first plurality of operands; identify a point add operation associated with the point multiply operation, wherein the point add operation comprises point addition of a second plurality of operands, wherein the second plurality of operands comprises a first point and a second point, and wherein the first point and the second point are associated with a first coordinate system; convert the second point from the first coordinate system to a second coordinate system; perform the point add operation based on the first point associated with the first coordinate system and the second point associated with the second coordinate system; and perform the point multiply operation based on a result of the point add operation.

Subject matter disclosed herein may relate to arithmetic units of processors, and may relate more particularly to configurable arithmetic units. Configurable arithmetic units may comprise a plurality of basic units, and may further comprise a programmable fabric to selectively connect the plurality of basic units at least in part to process one or more sets of parameters in accordance with one or more specified arithmetic operations.

In this application, example methods for performing quantum Montgomery arithmetic are disclosed. Additionally, circuit implementations are disclosed for reversible modular arithmetic, including modular addition, multiplication and inversion, as well as reversible elliptic curve point addition. This application also shows that elliptic curve discrete logarithms on an elliptic curve defined over an n-bit prime field can be computed on a quantum computer with at most 9n+2 log.sub.2(n)+10 qubits using a quantum circuit of at most 512n.sup.3 log.sub.2(n)+3572n.sup.3 Toffoli gates.

Embodiments of a system for, and method for using, an elliptic curve cryptography integrated circuit are generally described herein. An elliptic curve cryptography (ECC) operation request may be received. One of a plurality of circuit portions may be instructed to perform the ECC operation. The plurality of circuit portions that may be used include a finite field arithmetic circuit portion, an EC point addition and doubler circuit portion, a finite field exponentiation circuit portion, and a point multiplier circuit portion. The result of the ECC operation may then be output.

Elliptic curve cryptographic schemes performed between a pair of cryptographic correspondent computing devices. In an aspect, a first entity generates a first basis point in a first selected basis being, either a first basis (A) or a second basis (B), and performs a first key generation in the selected basis. A second entity receives the public key and determines the product of a predetermined scalar in a second selected basis being either the first basis (A) or the second basis (B) and one of the first auxiliary points. If the product is an identity point, performs second key generation in the second selected basis, otherwise performing second key generation in either of the first basis (A) or the second basis (B). A common key is generated using the private keys and public keys. In another aspect, a scheme is performed symmetrically between two entities to generate a common key.