The present disclosure relates to devices and methods for transforming program source code using a rematerialization operation. The devices and methods may identify at least one hot spot with high register pressure in a program source code for an application and identify a plurality of live variables within the at least one hot spot. The devices and methods may group the plurality of live variables by a basic block that has contained a define or single use of the plurality of live variables. The devices and methods may build a directed acyclic graph (DAG) for each basic block that has a grouped plurality of live variables. The devices and methods may save the DAG as a candidate instruction to move in the program source code and may generate transformed program source code for the application by moving the candidate instruction.

A system and method for partition administrative (admin) targeting in an application server, cloud, or other computing environment. An application server can include one or more partitions, wherein each partition provides an administrative and runtime subdivision of a domain. An administrative virtual target associated with a partition enables an administrator to identify an administrative resource group, including one or more administrative applications or resources, for use with the partition. A partition administrative lifecycle state (e.g., SHUTDOWN) can be associated with various substates (e.g., BOOTED or HALTED). When a partition is associated with a first state or substate (e.g., SHUTDOWN.BOOTED), the administrative resource group in that partition continues to run at an associated target, while other resource groups are shut down. When a partition is associated with a second state or substate (e.g., SHUTDOWN.HALTED), all of the resource groups, including administrative resource groups, in that partition are shut down.

The present disclosure is related to a virtual register file. Source code can be compiled to include references to a virtual register file for data subject to a logical operation. The references can be dereferenced at runtime to obtain physical addresses of memory device elements according to the virtual register file. The logical operation can be performed in the memory device on data stored in the memory device elements.

Implementations of the present specification provide a method, an apparatus, and an electronic device for improving parallel performance of a CPU. The method includes: attempting to acquire data requests that are of a same type and that are allocated to the CPU core; determining a number of requests that are specified by the acquired one or more data requests; and in response to determining that the number of requests is greater than or equal to a maximum degree of parallelism: executing executable codes corresponding to the maximum degree of parallelism, wherein the maximum degree of parallelism is a maximum number of parallel threads executable by the CPU, and wherein the executable codes comprise code programs that are compiled and linked based on the maximum degree of parallelism at a time that is prior to a time of the executing.

Device, circuit and method are configured to enhance throughout of processing of vast amount of data such as video stream. In some embodiment frequently used data blocks are stored in a fast RAM of the processor. In another embodiment received stream of data is divided to plurality of data portions and is streamed concurrently to streaming multiprocessors of a graphic processing unit (GPU) and is processed concurrently before the entire stream is loaded.

A generation apparatus includes a memory configured to store variable value information indicating variable value candidates for each variable name, and a processor configured to generate a first machine language instruction corresponding to a first code in response to receiving designation of the first code included in codes generated by a compiler, and when the generated first machine language instruction includes a variable name of a specific type, by reference to the variable value information stored in the memory, perform generation of a plurality of machine language instructions based on a plurality of pieces of variable value information associated with each of one or more variable names included in the generated first machine language instruction.

Described herein are techniques for saving registers in the event of a function call. The techniques include modifying a program including a block of code designated as a calling code that calls a function. The modifying includes modifying the calling code to set a register usage mask indicating which registers are in use at the time of the function call. The modifying also includes modifying the function to combine the information of the register usage mask with information indicating registers used by the function to generate registers to be saved and save the registers to be saved.

Systems and methods for utilizing virtual memory with a high-level programming language are provided. Multiple address spaces are created in virtual memory, wherein each of the multiple address spaces include data entries, each of which have a value. A machine executable software program is operated which utilizes each of said multiple address spaces. At least a first one of the address spaces is independent from at least a second one of said address spaces, and at least a third one of the address spaces is electronically associated with at least a fourth one of the address spaces.

A method, a computer program product, and a system for allocating a variable into storage class memory during compilation of a program. The method includes selecting a variable recorded in a symbol table during compilation and computing a variable size of the variable by analyzing attributes related to the variable. The method further includes computing additional attributes relating to the variable. The method also includes computing a control flow graph and analyzing the control flow graph and the additional attributes to determine an allocation location for the variable. The method further includes allocating the variable into a storage class memory based on the analysis performed.

An electronic device and a control method thereof are disclosed. The electronic device includes: a memory storing input data, and a processor including a first register file and a second register file storing index data corresponding to kernel data, wherein the processor is configured to: based on a first command being input, obtain offset information of valid data included in a part of the index data stored in the first register file, based on the number of pieces of the offset information being greater than or equal to a predetermined number, store data packed with the offset information in a unit of the predetermined number in the second register file, and obtain output data by performing an operation regarding the input data based on the packed data.