G06F9/355

System and method for managing execution of processes on a cluster of processing devices

Disclosed is a method and system for managing execution of processes on a cluster of processing devices by a supervising device. The method comprises receiving memory consumption information from each of a processing devices executing a plurality of processes. The method further comprises receiving information related to swapping of a new process from at least one processing device of the processing devices while memory available on the at least one processing device is insufficient to execute the new process. The method further comprises terminating either the new process being swapped or a process executing on the at least one processing device. The method further comprises instructing another processing device having sufficient memory available for execution of the new process being swapped or the process executing on the at least one processing device, whichever is terminated on the at least one processing device.

DATA PROCESSING APPARATUS AND METHOD FOR PREFETCH GENERATION

The invention provides a data processing apparatus and a data processing method for generating prefetches of data for use during execution of instructions by processing circuitry. The prefetches that are generated are based on a nested prefetch pattern. The nested prefetch pattern comprises a first pattern and a second pattern. The first pattern is defined by a first address offset between sequentially accessed addresses and a first observed number of the sequentially accessed addresses separated by the first address offset. The second pattern is defined by a second address offset between sequential iterations of the first pattern and a second observed number of the sequential iterations of the first pattern separated by the second address offset.

Ordered Event Stream Event Retention
20220035709 · 2022-02-03 ·

Retention of events of an ordered event stream is disclosed. Expiration of events stored in a segment of an ordered event stream (OES) can be desirable. New events are added to a head of an OES segment, and pruning events from a tail of the OES segment can be valuable. Processing applications can register a processing scheme for a segment, e.g., at-least-once processing, exact1y-once processing, etc., and can generate checkpoints indicating a degree of advancement in processing events of the segment. The ordered event stream can determine a cut point indicative of a progress point, that before which, events of an OES can be marked as ready for expiration. However, events that are marked for expiration can be retained to allow processing based on a checkpoint, e.g., expiration of the event can be refused until there is an assurance the event was read by the processing application.

ACCESSING DATA IN MULTI-DIMENSIONAL TENSORS
20170220352 · 2017-08-03 ·

Methods, systems, and apparatus, including an apparatus for processing an instruction for accessing a N-dimensional tensor, the apparatus including multiple tensor index elements and multiple dimension multiplier elements, where each of the dimension multiplier elements has a corresponding tensor index element. The apparatus includes one or more processors configured to obtain an instruction to access a particular element of a N-dimensional tensor, where the N-dimensional tensor has multiple elements arranged across each of the N dimensions, and where N is an integer that is equal to or greater than one; determine, using one or more tensor index elements of the multiple tensor index elements and one or more dimension multiplier elements of the multiple dimension multiplier elements, an address of the particular element; and output data indicating the determined address for accessing the particular element of the N-dimensional tensor.

ACCESSING DATA IN MULTI-DIMENSIONAL TENSORS
20170220352 · 2017-08-03 ·

Methods, systems, and apparatus, including an apparatus for processing an instruction for accessing a N-dimensional tensor, the apparatus including multiple tensor index elements and multiple dimension multiplier elements, where each of the dimension multiplier elements has a corresponding tensor index element. The apparatus includes one or more processors configured to obtain an instruction to access a particular element of a N-dimensional tensor, where the N-dimensional tensor has multiple elements arranged across each of the N dimensions, and where N is an integer that is equal to or greater than one; determine, using one or more tensor index elements of the multiple tensor index elements and one or more dimension multiplier elements of the multiple dimension multiplier elements, an address of the particular element; and output data indicating the determined address for accessing the particular element of the N-dimensional tensor.

Method and apparatus for quadrature mirror filtering

A method of performing quadrature mirror filter (QMF) synthesis filtering includes recording new samples corresponding to a current time slot at positions of samples to be discarded in a first array that includes modulated QMF sub-band samples. The method further includes extracting samples from the first array to remove aliasing between adjacent sub-bands, determining filter coefficients corresponding to the extracted samples by using modulo operation, and synthesizing a time domain sample where aliasing is removed by using the extracted samples and the filter coefficients.

Logical-to-physical mapping of data groups with data locality

A system includes integrated circuit (IC) dies having memory cells and a processing device coupled to the IC dies. The processing device performs operations including storing, within a zone map data structure, zones of a logical block address (LBA) space sequentially mapped to physical address space of the IC dies. A zone map entry in the zone map data structure corresponds to a data group written to one or more of the IC dies. The operations further include storing, within a block set data structure indexed by a block set identifier of the zone map entry, a die identifier and a block identifier for each data block of multiple data blocks of the data group, and writing multiple data groups, which are sequentially mapped across the zones, sequentially across the IC dies. Each data block can correspond to a media (or erase) block of the IC dies.

Logical-to-physical mapping of data groups with data locality

A system includes integrated circuit (IC) dies having memory cells and a processing device coupled to the IC dies. The processing device performs operations including storing, within a zone map data structure, zones of a logical block address (LBA) space sequentially mapped to physical address space of the IC dies. A zone map entry in the zone map data structure corresponds to a data group written to one or more of the IC dies. The operations further include storing, within a block set data structure indexed by a block set identifier of the zone map entry, a die identifier and a block identifier for each data block of multiple data blocks of the data group, and writing multiple data groups, which are sequentially mapped across the zones, sequentially across the IC dies. Each data block can correspond to a media (or erase) block of the IC dies.

AN APPARATUS AND METHOD FOR SPECULATIVELY VECTORISING PROGRAM CODE
20220236990 · 2022-07-28 ·

An apparatus and method are provided for speculatively vectorising program code. The apparatus includes processing circuitry for executing program code, the program code including an identified code region comprising at least a plurality of speculative vector memory access instructions. Execution of each speculative vector memory access instruction is employed to perform speculative vectorisation of a series of scalar memory access operations using a plurality of lanes of processing. Tracking storage is used to maintain, for each speculative vector memory access instruction, tracking information providing an indication of a memory address being accessed within each lane. Checking circuitry then references the tracking information during execution of the identified code region by the processing circuitry, in order to detect any inter lane memory hazard resulting from the execution of the plurality of speculative vector memory access instructions.

LOGIC SCALING SETS FOR CLOUD-LIKE ELASTICITY OF LEGACY ENTERPRISE APPLICATIONS
20210409347 · 2021-12-30 ·

Methods, systems, and computer-readable storage media for determining, by an instance manager and from a pattern associated with a system executing within a landscape, that a status of the system is to change to scaled-in, the pattern being absent any reference to instances of systems executed within landscapes, in response, identifying, by the instance manager and from a logic scaling set that is associated with the system, one or more instances of the system that are able to be scaled-in, selecting, by the instance manager, at least one instance of the one or more instances, and executing, by the instance manager, scaling of the system based on the at least one instance.