A system, processor, programming product and/or method including: an instruction dispatch unit configured to dispatch instructions of a compare immediate-conditional branch instruction sequence; and a compare register having at least one entry to hold information in a plurality of fields. Operations include: writing information from a first instruction of the compare immediate-conditional branch instruction sequence into one or more of the plurality of fields in an entry in the compare register; writing an immediate field and the ITAG of a compare immediate instruction into the entry in the compare register; writing, in response to dispatching a conditional branch instruction, an inferred compare result value into the entry in the compare register; comparing a computed compare result value to the inferred compare result value stored in the entry in the compare register; and not execute the compare immediate instruction or the conditional branch instruction.

An instruction processing device and an instruction processing method are disclosed. The instruction processing device includes: an instruction boundary prediction unit including circuitry configured to acquire an instruction packet of a variable-length instruction set and to add instruction prediction information to a plurality of instruction meta-fields in the instruction packet; and an instruction pipeline structure comprising an instruction fetch unit including an instruction boundary determination unit including circuitry configured to determine instruction boundary information according to the instruction prediction information to obtain one or more instructions in the instruction packet.

A system includes processor hardware and memory hardware that stores instructions. The instructions include, in response to receiving a request, determining a request type of the request, retrieving a first set of collected information, and selecting a first set of instructions corresponding to the request type. The instructions include constructing a first result by executing each instruction of the first set of instructions to create the first entry as a nested entry within the first result including data of the first set of collected information identified in the first set of instructions as nested or retrieve first data of the first set of collected information identified by the first instruction and add the first data to the first entry of the first result. The instructions include transforming a display of the operator device to complete a set of fields displayed on the display with corresponding entries of the first result.

Embodiments of systems, methods, and apparatuses for heterogeneous computing are described. In some embodiments, a hardware heterogeneous scheduler dispatches instructions for execution on one or more plurality of heterogeneous processing elements, the instructions corresponding to a code fragment to be processed by the one or more of the plurality of heterogeneous processing elements, wherein the instructions are native instructions to at least one of the one or more of the plurality of heterogeneous processing elements.

Techniques facilitating voltage droop reduction and/or mitigation in a processor core are provided. In one example, a system can comprise a memory that stores, and a processor that executes, computer executable components. The computer executable components can comprise an observation component that detects one or more events at a first stage of a processor pipeline. An event of the one or more events can be a defined event determined to increase a level of power consumed during a second stage of the processor pipeline. The computer executable components can also comprise an instruction component that applies a voltage droop mitigation countermeasure prior to the increase of the level of power consumed during the second stage of the processor pipeline and a feedback component that provides a notification to the instruction component that indicates a success or a failure of a result of the voltage droop mitigation countermeasure.

This application provides a method for managing a resource in a computer system and a terminal device. The method includes: obtaining data, where the data includes application sequence feature data related to a current foreground application, and the data further includes at least one of the following real-time data: a system time of the computer system, current status data of the computer system, and current location data of the computer system; selecting, from a plurality of machine learning models based on at least one of the real-time data, a target machine learning model that matches the real-time data; inputting the obtained data into the target machine learning model to rank importance of a plurality of applications installed in the computer system; and performing resource management based on a result of the importance ranking.

A data processing apparatus and method of operating such is disclosed. Issue circuitry buffers operations prior to execution until operands are available in a set of registers. A first and a second load operation are identified in the issue circuitry, when both are dependent on a common operand, and when the common operand is available in the set of registers. Load circuitry has a first address generation unit to generate a first address for the first load operation and a second address generation unit to generate a second address for the second load operation. An address comparison unit compares the first address and the second address. The load circuitry is arranged to cause a merged lookup to be performed in local temporary storage, when the address comparison unit determines that the first and the second address differ by less than a predetermined address range characteristic of the local temporary storage.

Disclosed herein is a method of creating an image stitching workflow including acquiring 360-degree virtual reality (VR) image parameters necessary to makes a request for image stitching and create the image stitching workflow, acquiring a list of functions applicable to the image stitching workflow, creating the image stitching workflow based on functions selected from the list of functions, determining the number of media processing entities necessary to perform tasks configuring the image stitching workflow and generating a plurality of media processing entities according to the determined number of media processing entities, and allocating the tasks configuring the image stitching workflow to the plurality of media processing entities.

A system includes a motor, a memory storing instructions and at least one controller configured to execute the instructions to cause the system to obtain at least one message over a network, the at least one message indicating a target position for a rotor of the motor and a target time associated with the target position, determine a position command and a speed command based on the target position and the target time, and control the motor based on the position command and the speed command.

Techniques for preventing concurrent execution of an infrastructure orchestration service are described. Worker nodes can receive instructions, or tasks, for deploying infrastructure resources and can provide heartbeat notifications to scheduler nodes, also considered a lease. A signing proxy can track the heartbeat notifications sent from the worker nodes to the scheduler node. The signing proxy can receive requests corresponding to a performance of the tasks assigned to the worker nodes. The signing proxy can determine whether the lease between each worker node and the scheduler is valid. If the lease is valid, the signing proxy may make a call to services on behalf of the worker node, and if the lease is not valid, the signing proxy may not make a call to services on behalf of the worker node. Instead, the signing proxy may cut off all outgoing network traffic, blocking access of the worker node to services.