G06F9/4418

Updating machine emulator

A method for hot updating machine emulator including requesting specified memory which is used to store the virtual machine memory address and virtual machine status information and is not released when updating a machine emulator; restoring the virtual machine status information from the specified memory after the machine emulator is updated. Thus, the techniques of the present disclosure accelerate recovery speed and shorten updating time.

Assigning devices to virtual machines in view of power state information
11614973 · 2023-03-28 · ·

In one implementation, a method of sharing a physical device between multiple virtual machines is provided. The method includes receiving, from a first virtual machine, a request to access a physical device of a computing device. The method also includes assigning, by a processing device, the physical device to the first virtual machine in view of power state information associated with the physical device of the computing device, wherein the power state information is received from one or more other virtual machines of the computing device.

HIERARCHICAL STATE SAVE AND RESTORE FOR DEVICE WITH VARYING POWER STATES

A disclosed technique includes triggering a change for a first set of one or more functional elements and for a second set of one or more functional elements from a high-power state to a low-power state; saving first state of the first set of one or more functional elements via a first set of one or more save-state elements; saving second state of the second set of one or more functional elements via a second set of one or more save-state elements; powering down the first set of one or more functional elements and the second set of one or more functional elements; and transmitting the first state and the second state to a memory.

SYSTEMS AND METHODS OF DISTRIBUTED PROCESSING
20230033983 · 2023-02-02 ·

In some embodiments a distributed computing system is provided that includes a plurality of different feature modules and a matching engine. The different feature modules each provide different processing for handling parent requests and submitting, to the matching engine, commands for child data transaction requests that are associated with the parent request.

WAKE SOURCE COMMUNICATION ACCORDING TO 10SPE LOCAL AND REMOTE WAKE AND RELATED SYSTEMS, METHODS, AND DEVICES
20230091738 · 2023-03-23 ·

One or more examples relate, generally, to an apparatus. Such an apparatus includes a digital interface, a wake detect logic, and a power management connection. The digital interface may define a physical layer transceiver side of a connection between a physical layer transceiver and a physical layer controller, respectively of a 10SPE physical layer. The wake detect logic may communicate a source of detected wake from the physical layer transceiver to the physical layer controller via the digital interface. The power management connection may operatively couple to an enable connection of a switched voltage regulator.

Computer program product and method and apparatus for controlling access to flash memory card

The invention is related to a non-transitory computer program product, a method and an apparatus for controlling access to a flash memory card. The method, performed by a processing unit of a bridge integrate circuit (IC), includes: determining whether a temperature of a motherboard has exceeded a threshold through a temperature sensor IC after receiving a host read or write command from a host side; requesting a flash memory card to enter a sleep state when the temperature of the motherboard has exceeded the threshold; and instructing the flash memory card to perform an operation corresponding to the host read or write command when the temperature of the motherboard hasn't exceeded the threshold. The bridge IC and the temperature sensor IC are disposed on the motherboard, the flash memory card is inserted into a card slot on the motherboard, and the bridge IC is coupled to the temperature sensor IC and the flash memory card through a circuit of the motherboard.

CONTROL DEVICE, SYSTEM ON CHIP, AND ELECTRONIC DEVICE

A control device comprises a plurality of processor clusters, and a controller including memory device, wherein the controller is configured to generate a first virtual machine and a second virtual machine different from the first virtual machine, wherein a first operation is performed by using the first virtual machine and a second operation different from the first operation is performed by using the second virtual machine on the plurality of processor clusters, wherein the second operation is stopped by a suspend operation for the second virtual machine and data for the second virtual machine is stored in the memory device, wherein the first operation is stopped by a suspend operation for the first virtual machine and data for the first virtual machine is stored in the memory device, wherein the second operation is performed by a resume operation for the second virtual machine while the first operation is being stopped.

SYSTEM ON CHIP, CONTROLLER AND VEHICLE

A controller that reduces power consumption and has improved performance is provided. The controller comprises a processor, and a memory device, wherein the processor is configured to generate a first virtual machine and a second virtual machine, which are different from each other, perform a first operation by using the first virtual machine, perform a second operation different from the first operation by using the second virtual machine, stop the second operation by performing a suspend operation for the second virtual machine, store data for the second virtual machine in the memory device, stop the first operation by performing a suspend operation for the first virtual machine after stopping the second operation, store data for the first virtual machine in the memory device, generate the second virtual machine by using the data for the second virtual machine from the memory device by performing a resume operation for the second virtual machine while the first operation is being stopped, and perform the second operation by using the second virtual machine.

Technologies for operating system transitions in multiple-operating-system environments

Examples for transitioning between operating systems are disclosed. An example apparatus includes reserved copy circuitry to copy state data of a first operating system from a first portion of first memory to a second portion of the first memory in response to an operating system toggle event; toggle event circuitry to, in response to a determination that the state data has been copied to the second portion of the first memory, initiate execution of a second operating system, the second operating system loaded from a hibernation file in second memory; and write out circuitry to copy the state data of the first operating system from the second portion of the first memory to the hibernation file while the second operating system is executed on the apparatus.

SELECTIVE HIBERNATION OF ACTIVITIES IN AN ELECTRONIC DEVICE

In an electronic device capable of running multiple software applications concurrently, applications, documents, cards, or other activities can be selected for hibernation so as to free up system resources for other activities that are in active use. A determination is made as to which activities should hibernate, for example based on a determination as to which activities have not been used recently or based on relative resource usage. When an activity is to hibernate, its state is preserved on a storage medium such as a disk, so that the activity can later be revived in the same state and the user can continue with the same task that was being performed before the activity entered hibernation.