A technique for managing undervoltage in a compute system is disclosed. The technique includes a method that further includes: detecting an AC undervoltage condition in the compute system; and upon detecting the AC undervoltage condition: dynamically determining a holdup time as a function of the present load; determining a monitoring period as a function of the dynamically determined holdup time; waiting for the determined monitoring period to expire; and upon expiration of the determined monitoring period, perform a shutdown process if the AC undervoltage condition persists.

An information handling system and keyboard automatically coordinate wireless pairing when the keyboard couples to the information handling system to interface contacts exposed at the information handling system housing and the keyboard. The information handling system retrieves an identifier of the keyboard through a contact, determines if the keyboard is already paired, and if not initiates wireless pairing with a command through the contact. A pairing key is provided from the keyboard to the information handling system through the contact and applied by the information handling system to complete pairing. A confirm code is communicated through the contact to the keyboard for communication back to the information handling system by wireless signals. The contacts provide a charging path to charge the keyboard when coupled to the information handling system.

Some implementations can include an all-in-one computer system and associated methods.

A method and device for sensing a temperature of a battery. A temperature of a power supply in an electronic device is monitored. One or more heat producing components of the electronic device are disabled when the monitored temperature of the power supply is higher than a first temperature. The one or more disabled heat producing components are restarted to restore electronic device functionality in an ordered manner when the monitored temperature of the power supply reaches a second temperature that is less than the first temperature.

A control system includes a management unit configured to control a power supply device toward a target value for an output performance value of the power supply device that supplies power to a predetermined device, and an acquisition unit configured to acquire information related to a post-shutdown task scheduled to be executed after a shutdown condition of the predetermined device is satisfied, in which the management unit refers to the information acquired by the acquisition unit, and, when the post-shutdown task is scheduled to be executed, sets the target value to a second target value which is higher than a first target value set when the post-shutdown task is scheduled to be executed, before the shutdown condition is satisfied.

A processing device is configured to process an initial set of command types. A command extension module and a digital signature are received. The digital signature is generated based on the command extension module using a private key of a key pair. The command extension module, once installed by the processing device, enables the processing device to process a new command type that is not included in the initial set of command types. The digital signature is verified using a public key of the key pair. Based on a successful verification of the digital signature, the command extension module is temporarily installed by loading the command extension module in a volatile memory device.

An information processing device includes processing circuitry configured to determine whether or not there is integrity in predetermined data regarding a boot sequence of an Operating System (OS) during execution of shutdown of the OS, arid suspend shutdown of the OS when it is determined that there is no integrity in the predetermined data.

Disclosed is a multi-processor system, which includes a master processor, a non-volatile memory and a plurality of slave processors. The non-volatile memory is used to store first boot firmware and second boot firmware. Each slave processor includes a JTAG port, and each JTAG port is respectively connected to one I/O port of the master processor. When the master processor is powered on or rebooted, it reads the first boot firmware and performs a booting process. After the master processor completes the booting process, it establishes communication connections with the plurality of slave processors, releases a reset signal to the plurality of slave processors respectively to control the startup of the plurality of slave processors, and reads the second boot firmware and transmits the second boot firmware to the plurality of slave processors respectively to make the plurality of slave processors booted according to the received second boot firmware.

A processing device is configured to process an initial set of command types. A command extension module and a digital signature are received. The digital signature is generated based on the command extension module using a private key of a key pair. The command extension module, once installed by the processing device, enables the processing device to process a new command type that is not included in the initial set of command types. The digital signature is verified using a public key of the key pair. Based on a successful verification of the digital signature, the command extension module is temporarily installed by loading the command extension module in a volatile memory device.

A reconfigurable processor includes a plurality of sub-arrays of configurable units, each sub-array including a master address generation and coalescing unit (MAGCU) containing a force-quit controller. The force-quit controller on a MAGCU of a particular sub-array is configurable to execute a force-quit process in response to a force-quit command, including transitioning MAGCU from any current state to a force-quit wait state, starting a counter, broadcasting force-quit control signals to reset the configurable units in the particular sub-array, and de-asserting an output port of MAGCU on an interconnect among the configurable units. Upon expiration of the counter, MAGCU is configurable to assert its output onto the interconnect once its input and output buffers are empty, sample an input port from the interconnect to detect that every configurable unit in the particular sub-array has asserted its output port onto the interconnect, and send a force-quit completion interrupt.