Technologies for switching network traffic include a network switch. The network switch includes one or more processors and communication circuitry coupled to the one or more processors. The communication circuitry is capable of switching network traffic of multiple link layer protocols. Additionally, the network switch includes one or more memory devices storing instructions that, when executed, cause the network switch to receive, with the communication circuitry through an optical connection, network traffic to be forwarded, and determine a link layer protocol of the received network traffic. The instructions additionally cause the network switch to forward the network traffic as a function of the determined link layer protocol. Other embodiments are also described and claimed.

A tracking method, an apparatus, a device, and a machine-readable medium are provided. The method specifically includes: writing a tracking result of an activity of an operating system and/or a running activity of a program into a buffer when an interrupt is disabled; and reading and sending the tracking result from the buffer when the interrupt is enabled. The embodiments of the present disclosure can effectively shorten the maximum time during which interrupts are disabled for an operating system, and thereby can effectively improve the performance of the operating system and/or a program.

A computer system comprising: (i) a computer subsystem configured to act as a work accelerator, and (ii) a gateway connected to the computer subsystem, the gateway enabling the transfer of data to the computer subsystem from external storage at pre-compiled data exchange synchronization points attained by the computer subsystem, which act as a barrier between a compute phase and an exchange phase of the computer subsystem, wherein the computer subsystem is configured to pull data from a gateway transfer memory of the gateway in response to the pre-compiled data exchange synchronization point attained by the subsystem, wherein the gateway comprises at least one processor configured to perform at least one operation to pre-load at least some of the data from a first memory of the gateway to the gateway transfer memory in advance of the pre-compiled data exchange synchronization point attained by the subsystem.

A method of memory deallocation across a trust boundary between a first software component and a second software component is described. Some memory is shared between the first and second software components. An in-memory message passing facility is implemented using the shared memory. The first software component is used to deallocate memory from the shared memory which has been allocated by the second software component. The deallocation is done by: taking at least one allocation to be freed from the message passing facility; and freeing the at least one allocation using a local deallocation mechanism while validating that memory access to memory owned by data structures related to memory allocation within the shared memory are within the shared memory.

Methods, systems, apparatuses, and computer program products are provided for generating an instruction set for an evaluation engine. An arithmetic expression that combines multiple columns of data (e.g., a first column of data, a second column of data, etc.) is received. Instructions may be generated, that, when executed by an integrated-circuit-based processor, cause the integrated-circuit-based processor to evaluate the arithmetic expression. In examples, a set of instructions may be generated for each column of data represented in the arithmetic expression. For instance, the instructions may comprise a first set of instructions associated with the first column of data, a second set of instructions associated with the second column of data, and so on. The instructions may specify one or more parameters for operations associated with each column of data, such as operations to load data from a buffer, store data into a buffer, arithmetic operations to perform on data, etc.

Systems and methods are provided for management of processor thread used in support of workspaces operating on an IHS (Information Handling System), where the workspaces operate in isolation from the operating system of the IHS. A remote workspace orchestration service manages deployment of workspaces on the IHS. The workspaces are instantiated and operate according to a workspace definition provided by the workspace orchestration service. A remote access controller of the IHS determine one or more processor threads of the IHS used in support of the workspaces. The remote access controller monitors memory utilization by the processor threads used in support of the workspaces in order to detect memory thrashing resulting from the operation of a particular workspace. Based on the monitored memory utilization, the processor threads used in support of the workspaces are modified in order to reduce memory thrashing during the operation of the workspaces.

The present invention provides a data read-write method and apparatus and a circular queue. The method includes: obtaining an offset position of a write pointer from a queue head of a circular queue; determining an offset position of a read pointer according to the offset position of the write pointer; and reading data from the circular queue according to the offset position of the read pointer. Single input multiple output of share memory is implemented, and therefore a plurality of read threads may read data from the circular queue in parallel, thereby effectively improving read-write efficiency of data, and reducing memory consumption.

A method comprises: at a computer device configured with user applications grouped in multiple virtual desktops hosted on and displayed by the computer device: establishing an online meeting with remote computer devices over a network; responsive to user input, selecting one of the multiple virtual desktops to be a shared virtual desktop, such that all other ones of the multiple virtual desktops become unshared virtual desktops; sharing, with the remote computer devices, the shared virtual desktop, including first user applications of the user applications that are grouped in the shared virtual desktop; and not sharing, with the remote computer devices, any of the unshared virtual desktops and second user applications of the user applications that are grouped in the unshared virtual desktops.

An apparatus includes a CPU core, a first cache subsystem coupled to the CPU core, and a second memory coupled to the cache subsystem. The first cache subsystem includes a configuration register, a first memory, and a controller. The controller is configured to: receive a request directed to an address in the second memory and, in response to the configuration register having a first value, operate in a non-caching mode. In the non-caching mode, the controller is configured to provide the request to the second memory without caching data returned by the request in the first memory. In response to the configuration register having a second value, the controller is configured to operate in a caching mode. In the caching mode the controller is configured to provide the request to the second memory and cache data returned by the request in the first memory.

A method for quantum classification and operation control includes radiating a vacuum chamber having an ensemble of neutral atoms with laser so as to trap atoms and form a quantum register. The method further includes the step of configuring a laser controlling function with M unitary operations based on a cost function for classification problems and a training dataset about a monitored target, radiating the ensemble of atoms accordingly, reading the quantum register, and setting a quantum classifier if the cost function with the values of the quantum register meet a condition, keep changing the laser controlling function and radiating the ensemble of atoms otherwise until a convergence condition is met, at which point the quantum classifier is set.