Patent classifications
G06F9/544
System and method for system for acquiring data
A method of acquiring data, a computer program product for implementing the method, a system for acquiring data, and a vehicle including the system. The method includes determining one or more data types and virtual channels required for one or more applications. The method also includes allocating a plurality of circular buffers in memory according to the determined data type(s) and virtual channel(s). One or more of the circular buffers are allocated to safety data lines. The remaining circular buffers are allocated to functional data lines. The method further includes storing at least one functional data line in a circular buffer allocated to functional data lines according to a data type and virtual channel of the functional data line. The method also includes storing at least one safety data line in a circular buffer allocated to safety data lines.
Tensor Accelerator Capable of Increasing Efficiency of Data Sharing
A tensor accelerator includes two tile execution units and a bidirectional queue. Each of the tile execution units includes a buffer, a plurality of arithmetic logic units, a network, and a selector. The buffer includes a plurality of memory cells. The network is coupled to the plurality of memory cells. The selector is coupled to the network and the plurality of arithmetic logic units. The bidirectional queue is coupled between the selectors of the tile execution units.
SYSTOLIC ARRAY-BASED DATA PROCESSING METHOD AND APPARATUS, MEDIUM, AND PROGRAM PRODUCT
The present disclosure provides a systolic array-based data processing method that includes determining an input splice quantity for the systolic array based on a target input depth and a standard input depth, and determining an output splice quantity for the systolic array based on a target output depth and a standard output depth; inputting the input data matching the input splice quantity to an input buffer of the systolic array in batches, without overlaps in the input data, and processing, by the systolic array, the input data in the input buffer to generate output data corresponding to each piece of input data; and in accordance with a determination that a quantity of output data received by an output buffer of the systolic array from the systolic array matches the output splice quantity, outputting, in the output buffer, output data having a quantity matching the output splice quantity in batches.
COMPUTER-READABLE RECORDING MEDIUM HAVING STORED THEREIN CONTROL PROGRAM, INFORMATION PROCESSING APPARATUS, AND METHOD FOR CONTROLLING
A computer readable recording medium having stored therein a control program that causes a computer to execute a process including: when an application transmits an IO request, determining whether to execute a process before the application receives a completion response of an IO process to the IO request instead of executing the process after the completion response, based on a first and second indicators, the first indicator relating to a performance decline ratio when the process is executed before the completion response, the second indicator relating to a performance decline ratio when a snapshot of a memory region at a time point that the IO request is transmitted is generated, the memory region storing an execution code of the application; and when determining to execute the process before the completion response, generating the snapshot of the memory region, and causing the application to start execution of the process.
SOFTWARE DEFINED RANDOMIZATION FOR THE MITIGATION OF UNKNOWN VULNERABILITIES
Various embodiments of an apparatus, methods, systems and computer program products described herein are directed to detecting initiation of one or more shared libraries being loaded into a runtime memory of an application. While the one or more shared libraries are being loaded into the runtime memory, randomization code is placed into the runtime memory. For each respective shared library loaded into the runtime memory: randomization code allocates a new segment of runtime memory. The randomization code inserts a copy of the shared library into the new segment of runtime memory and overwrites a current segment of runtime memory at which the shared library is currently stored.
BATCH EVENT DELIVERY WITH IDENTIFIERS
Methods, systems, and apparatus, including computer programs encoded on computer storage media, for improved delivery likelihood of batch events. One of the methods includes receiving, from an upstream system in an event processing pipeline, a request to store a first batch of events in persistent memory, the request including the first batch of events and a first identifier for the first batch of events; providing, to a downstream system in the event processing pipeline, a data storage request that includes the first batch of events and the first identifier; receiving, from the downstream system, the first confirmation that includes the first identifier and indicates that the first batch of events was successfully committed; and in response to receiving the first confirmation: sending, to the upstream system, a second confirmation message that includes the first identifier and indicates that the first batch of events was successfully committed.
HIGH-THROUGHPUT BPF MAP MANIPULATIONS WITH UPROBES
High-throughput BPF map manipulations with uprobes are disclosed. A method for manipulating a Berkeley Packet Filter (BPF) map comprises running a user program in a user space of a computing environment. The user program includes a trigger function. A corresponding kernel BPF probe is installed by the user program on the trigger function. The kernel BPF probe is triggered by reaching a memory address of the trigger function in the user space. The trigger function includes one or more arguments that the BPF map agent interprets as operation parameters. The BPF map agent performs one or more operations to manipulate a BPF map in the kernel space based on the operation parameters.
System and method for timely and uniform distribution for real-time packet transmission
A system and method is provided for timely and uniform real-time data packet transmission by a computing device. The system can include a shared packet memory buffer for storing data packets generated by a user application and a shared schedule memory buffer for storing packet identifiers and corresponding time slots for the data packets. Moreover, a kernel module is provided that operates in the kernel mode of the operating system directly above the network interface controller and can continuously poll the shared scheduled memory to access packet identifiers at corresponding time slots. Based on the packet identifiers in each time slot, the kernel module can pull the data packet having the packet identifier directly from the ring buffer and send each packet to the network interface controller for transmission as part of a media stream over a network to a media consuming device.
Memory transaction request management for an ordered unit of data items
A method of requesting data items from storage. The method comprising allocating each of a plurality of memory controllers a unique identifier and assigning memory transaction requests for accessing data items to a memory controller according to the unique identifiers. The data items are spatially local to one another in storage. The data items are requested from the storage via the memory controllers according to the memory transaction requests and then buffered if the data items are received out of order relative to an order in which the data items are requested.
Controlled NOT gate parallelization in quantum computing simulation
Techniques facilitating controlled NOT gate parallelization in quantum computing simulation are provided. A system can comprise a memory that stores computer executable components and a processor that executes the computer executable components stored in the memory. The computer executable components can comprise a selector component that can select a first qubit and a second qubit. The first qubit can be a control qubit. The computer executable components can also comprise a parallelization component that can reorder the first qubit with the second qubit and a replication component that can simulate a controlled NOT gate during the reordering by the parallelization component.