G06F9/544

Method and apparatus for device-specific communication between application programs
09720745 · 2017-08-01 · ·

A method for providing communication between application programs running via devices connected to a same network is provided. The method includes an operation for connecting a first application program, which is running in a first device via a web socket server in the first device, with a second application program, which is running in a second device, and an operation for transmitting and receiving data between the second application program and the first application program via the web socket server.

DISCOVERING GRAYMAIL THROUGH REAL-TIME ANALYSIS OF INCOMING EMAIL

Techniques for identifying and processing graymail are disclosed. An electronic message store is accessed. A determination is made that a first message included in the electronic message store represents graymail, including by accessing a profile associated with an addressee of the first message. A remedial action is taken in response to determining that the first message represents graymail.

RESTARTABLE, LOCK-FREE CONCURRENT SHARED MEMORY STATE WITH POINTERS

Systems and methods for processing memory address spaces corresponding to a shared memory are disclosed. After a writer restart process, pre-restart writer pointers of a pre-restart writer addressable space in the shared memory are replaced with corresponding location independent pointers. A writer pointer translation table is rebuilt in the shared memory to replace an association of modified pre-restart writer pointers and pre-restart translation base pointers based on the pre-restart writer pointers, respectively, with an association of modified post-restart writer pointers and post-restart translation base pointers based on post-restart writer pointers, respectively. After the writer pointer translation table is rebuilt, the location independent pointers are replaced with post-restart writer pointers in the shared memory, respectively, and the post-restart writer pointers are stored in the shared memory for access by one or more readers of the shared memory.

Parallel processing system and operation method of parallel processing system

A parallel processing system includes a plurality of computers accessibly connected through a network, and distributedly executing a plurality of processes. Each of the plurality of computers is composed of an operation processing unit configured to execute an allocated process, a local memory group having a first area and a second area and an I/O control circuit. The operation processing unit executes the allocated process by using the first area as an access destination in a first period and, and executes the allocated process by using the second area as the access destination in a second period subsequent to the first period. The I/O control circuit is composed of an updating section configured to update data stored in the local memory group to the latest data by carrying out communication among the computers. The updating section updates the data stored in the first area in the second period.

SCRIPTING ON A TELEMATICS CONTROL UNIT

A telematics control system includes: an external server configured to serialize a script with an external protocol buffer and transmit the serialized script to a TCU; a vehicle having sensors and the TCU, the TCU configured to: deserialize the script with a TCU protocol buffer, execute the script via an interpreter preloaded on the TCU, store data from the sensors based on the script.

SYSTEMS AND METHODS FOR VIRTIO BASED OPTIMIZATION OF DATA PACKET PATHS BETWEEN A VIRTUAL MACHINE AND A NETWORK DEVICE FOR LIVE VIRTUAL MACHINE MIGRATION
20170322828 · 2017-11-09 ·

A new approach is proposed that contemplates systems and methods to support virtio-based data packet path optimization for live virtual machine (VM) migration for Linux. Specifically, a data packet receiving (Rx) path and a data packet transmitting (Tx) path between a VM running on a host and a virtual function (VF) driver configured to interact with a physical network device of the host to receive and transmit communications dedicated to the VM are both optimized to implement a zero-copy solution to reduce overheads in packet processing. Under the proposed approach, the data packet Tx path utilizes a zero-copy mechanism provided by Linux kernel to avoid copying from virtio memory rings/Tx vrings in memory of the VM. The data packet Rx path also implements a zero-copy solution, which allows a virtio device of the VM to communicate directly with the VF driver of the network device while bypassing a macvtap driver entirely from the data packet Rx path.

Systems and methods for building generic CI/CD pipelines

At least one application may include instructions comprising application instructions and a plurality of separate pipeline definition instructions. The application instructions may be within a virtual container including at least one program that is generically executable in a plurality of different continuous integration and delivery (CI/CD) environments. Each of the plurality of separate pipeline definition instructions may be configured for each of the plurality of different CI/CD environments such that each pipeline definition may operate only in the CI/CD environment for which it is created. Each pipeline definition may be configured to cause the CI/CD environment for which it is created to execute the at least one program.

On-board computing system for an aircraft

An on-board computing system for an aircraft. The computing system comprises a plurality of partitions each including at least one software component configured to perform a function related to the aircraft, wherein software components of different partitions of the plurality of partitions are configured to exchange data via a communication hub of the computing system, the communication hub being configured to store data items exported by exporting software components of the plurality of partitions and to provide the stored data items to reading software components of the plurality of partitions.

Arithmetic processing unit and control method for arithmetic processing unit
11249763 · 2022-02-15 · ·

An arithmetic processing unit includes an instruction decoder which decodes a fetch instruction to issue an execution instruction; a reservation station which temporarily stores the execution instruction; and an arithmetic unit which executes the execution instruction, and the fetch instruction includes a multi-flow instruction which is divided into divided instructions and a single instruction. The instruction decoder includes: a pre-decoder including N number of slots each of which divides the multi-flow instruction into divided instructions; a main decoder including N number of slots each of which decodes the instructions to issue an execution instruction; and a pre-decoder buffer including N−K number of slots each of which temporarily stores instructions in the pre-decoder. The instruction decoder repeats transferring the divided instructions and the single instructions from the slots of the pre-decoder and the slots of the pre-decoder buffer to the main decoder as much as possible in order.

High performance merge sort with scalable parallelization and full-throughput reduction

Disclosed herein is a novel multi-way merge network, referred to herein as a Hybrid Comparison Look Ahead Merge (HCLAM), which incurs significantly less resource consumption as scaled to handle larger problems. In addition, a parallelization scheme is disclosed, referred to herein as Parallelization by Radix Pre-sorter (PRaP), which enables an increase in streaming throughput of the merge network. Furthermore, high performance reduction scheme is disclosed to achieve full throughput.