One or more units of decompressed data of a plurality of units of decompressed data is written to a target location for subsequent writing to memory. The plurality of units of decompressed data includes a plurality of symbol outputs and has associated therewith a plurality of decompression headers. A determination is made that the subsequent writing to memory of at least a portion of another unit of decompressed data to be written to the target location is to be stalled. A symbol start position of the other unit of decompressed data and a decompression header of a selected unit of the one or more units of decompressed data written to the target location are provided to a component of the computing environment. The decompression header is used for the subsequent writing of the other unit of decompressed data to memory.

In one embodiment, a method includes: receiving an input by an application executable on a computing device, the application being presented in a first window displayable on the computing device and configured to provide access to another application, and the another application being displayable in a second window different than the first window; and providing by the application a message to the another application to modify access to content of the another application via the computing device in response to receipt of the input by the application, so as prevent display of the content within the second window of the computing device.

Methods, systems and computer program products for lockless acquisition of memory for RDMA operations. A contiguous physical memory region is allocated. The contiguous physical memory region is divided into a plurality of preregistered chunks that are assigned to one or more process threads that are associated with an RDMA NIC. When responding to a request from a particular one of the one or more process threads, a buffer carved from the preregistered chunk of the contiguous physical memory region is assigned to the requesting process thread. Since the memory is pre-registered, and since the associations are made at the thread level, there is no need for locks when acquiring a buffer. Furthermore, since the memory is pre-registered, the threads do not incur registration latency. The contiguous physical memory region can be a contiguous HugePage contiguous region from which a plurality of individually allocatable buffers can be assigned to different threads.

A technique for transferring data in a digital signal processing system is described. In one example, the digital signal processing system comprises a number of fixed function accelerators, each connected to a memory access controller and each configured to read data from a memory device, perform one or more operations on the data, and write data to the memory device. To avoid hardwiring the fixed function accelerators together, and to provide a configurable digital signal processing system, a multi-threaded processor controls the transfer of data between the fixed function accelerators and the memory. Each processor thread is allocated to a memory access channel, and the threads are configured to detect an occurrence of an event and, responsive to this, control the memory access controller to enable a selected fixed function accelerator to read data from or write data to the memory device via its memory access channel.

A method and an apparatus for processing data, and a non-transitory computer readable storage medium. The method includes: obtaining a face recognition model stored in a first operation environment; performing an initialization on the face recognition model in the first operation environment, and transmitting the face recognition model subjected to the initialization to a second operation environment for storing, in which, a storage space in the first operation environment is greater than a storage space in the second operation environment.

Systems and techniques for adaptive dataflow transformation in edge computing environments are described herein. A transformation compatibility indication may be received from a device. A set of transformations available for use by the device connected to the network may be determined based on the transformation compatibility indicator. The set of transformations may be transmitted to the device. A value may be determined for an operating metric for an edge computing node of the network. The edge computing node may provide a service to the device via the network. A transformation request may be transmitted to the device based on the value. The transformation request may cause the device to execute a transformation of the set of transformations to transform a dataflow of the service. The adaptive dataflow transformations may be continuous with changing predicted values of operating metrics.

A plurality of network sensors are configured to sense the operations of a data network and, responsive to sensing the operations of the data network, generate event data objects that record the operations of the data network. One or more decorator pipelines are configured to decorate the event data objects with data other than from operations of the data network. A security frontend is configured to generate a graphical user interface (GUI) configured to provide, to a user, query-authoring tools, receiving a query in a structured language, provide responsive to receiving the query, results to the query from historic event data that was decorated before the query was received, receive approval for the query, and later execute the query on new event data that has been decorated after the approval for the query is received.

Embodiments for allocating and reclaiming memory using dynamic buffer allocation for a slab memory allocator. The method keeps track of a count of a total number of worker threads and a count of a total number of quiesced threads, and determines if there is any free slab memory. If there is no free slab memory, the method triggers an out of memory event and increments the count of the total number of quiesced threads. It reclaims all objects currently allocated in an object pool, and allocates a buffer of a next smaller size than an original buffer until a sufficient amount of slab memory is freed.

A processor system comprises a shared memory and a processing element. The processing element includes a matrix processor unit and is in communication with the shared memory. The processing element is configured to receive a processor instruction specifying a data matrix and a matrix manipulation operation. A manipulation matrix based on the processor instruction is identified. The data matrix and the manipulation matrix are loaded into the matrix processor unit and a matrix operation is performed to determine a result matrix. The result matrix is outputted to a destination location.

A computing system includes a host, a first electronic device connected to the host, and a second electronic device that communicates with the host through the first electronic device. The first electronic device requests a command written in a submission queue of the host based on a doorbell transmitted from the host, stores the command transmitted from the host, requests write data stored in a data buffer of the host, and stores the write data of the data buffer transmitted from the host.